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Date:   Mon,  8 Feb 2021 16:00:39 +0100
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org, Sandy Huang <hjc@...k-chips.com>,
        Heiko Stuebner <heiko@...ech.de>,
        Ezequiel Garcia <ezequiel@...labora.com>,
        Paul Kocialkowski <paul.kocialkowski@...tlin.com>,
        Sasha Levin <sashal@...nel.org>
Subject: [PATCH 5.4 07/65] arm64: dts: rockchip: fix vopl iommu irq on px30

From: Sandy Huang <hjc@...k-chips.com>

[ Upstream commit 656c648354e1561fa4f445b0b3252ec1d24e3951 ]

The vop-mmu shares the irq with its matched vop but not the vpu.

Fixes: 7053e06b1422 ("arm64: dts: rockchip: add core dtsi file for PX30 SoCs")
Signed-off-by: Sandy Huang <hjc@...k-chips.com>
Signed-off-by: Heiko Stuebner <heiko@...ech.de>
Reviewed-by: Ezequiel Garcia <ezequiel@...labora.com>
Reviewed-by: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
Tested-by: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
Link: https://lore.kernel.org/r/20210108110627.3231226-1-heiko@sntech.de
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
 arch/arm64/boot/dts/rockchip/px30.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 9e09909a510a1..98b014a8f9165 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -860,7 +860,7 @@
 	vopl_mmu: iommu@...70f00 {
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff470f00 0x0 0x100>;
-		interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "vopl_mmu";
 		clocks = <&cru ACLK_VOPL>, <&cru HCLK_VOPL>;
 		clock-names = "aclk", "hclk";
-- 
2.27.0



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