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Date:   Tue, 9 Feb 2021 15:13:24 +0100
From:   Marcin Wojtas <mw@...ihalf.com>
To:     Kostya Porotchkin <kostap@...vell.com>
Cc:     Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        Vladimir Vid <vladimir.vid@...tura.hr>, tmn505@...il.com,
        luka.kovacic@...tura.hr,
        Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
        Grégory Clement <gregory.clement@...tlin.com>,
        Andrew Lunn <andrew@...n.ch>, Rob Herring <robh+dt@...nel.org>,
        vkoul@...nel.org, kishon@...com,
        Miquèl Raynal <miquel.raynal@...tlin.com>,
        Grzegorz Jaszczyk <jaz@...ihalf.com>, nadavh@...vell.com,
        Stefan Chulski <stefanc@...vell.com>,
        Ben Peled (בן פלד) <bpeled@...vell.com>
Subject: Re: [PATCH v4 4/5] dts: marvell: Enable 10G interface on 9130-DB board

Hi,


wt., 9 lut 2021 o 14:47 <kostap@...vell.com> napisał(a):
>
> From: Stefan Chulski <stefanc@...vell.com>
>
> This patch enables eth0 10G interface on CN9130-DB paltforms.
>
> Signed-off-by: Stefan Chulski <stefanc@...vell.com>
> Signed-off-by: Konstantin Porotchkin <kostap@...vell.com>
> ---
>  arch/arm64/boot/dts/marvell/cn9130-db.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
> index 8de3a552b806..97c74b81fd78 100644
> --- a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
> +++ b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
> @@ -125,7 +125,7 @@
>
>  /* SLM-1521-V2, CON9 */
>  &cp0_eth0 {
> -       status = "disabled";
> +       status = "okay";
>         phy-mode = "10gbase-kr";
>         /* Generic PHY, providing serdes lanes */
>         phys = <&cp0_comphy4 0>;
> --
> 2.17.1
>

You can add my:
Tested-by: Marcin Wojtas <mw@...ihalf.com>

Please do the same for cp1_eth0?

Best regards,
Marcin

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