lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAMuHMdVpHUmwfob6t_aWvaVVHpSDpF5HvLe_W5+KY9ky5A-qEw@mail.gmail.com>
Date:   Wed, 10 Feb 2021 14:53:01 +0100
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Lars Povlsen <lars.povlsen@...rochip.com>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        Steen Hegelund <Steen.Hegelund@...rochip.com>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        "open list:BROADCOM NVRAM DRIVER" <linux-mips@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] pinctrl: PINCTRL_MICROCHIP_SGPIO should depend on
 ARCH_SPARX5 || SOC_VCOREIII

Hi Lars,

On Wed, Feb 10, 2021 at 2:45 PM Lars Povlsen <lars.povlsen@...rochip.com> wrote:
> Geert Uytterhoeven writes:
> > the Microsemi/Microchip Serial GPIO device is present only Microsemi
> > VCore III and Microchip Sparx5 SoCs.  Hence add a dependency on
> > ARCH_SPARX5 || SOC_VCOREIII, to prevent asking the user about this
> > driver when configuring a kernel without support for these SoCs.
> >
> > Fixes: 7e5ea974e61c8dd0 ("pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO")
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
> > ---
> >  drivers/pinctrl/Kconfig | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
> > index 113073d5f89bbf70..3b75b1d7d3d1f1b0 100644
> > --- a/drivers/pinctrl/Kconfig
> > +++ b/drivers/pinctrl/Kconfig
> > @@ -353,8 +353,8 @@ config PINCTRL_OCELOT
> >
> >  config PINCTRL_MICROCHIP_SGPIO
> >         bool "Pinctrl driver for Microsemi/Microchip Serial GPIO"
> > -       depends on OF
> > -       depends on HAS_IOMEM
> > +       depends on OF && HAS_IOMEM
> > +       depends on ARCH_SPARX5 || SOC_VCOREIII || COMPILE_TEST
> >         select GPIOLIB
> >         select GPIOLIB_IRQCHIP
> >         select GENERIC_PINCONF
>
> Thank you for your patch. Unfortunately, it makes it impossible to use
> the driver across PCIe - which is a specifically desired configuration.
>
> Could you add CONFIG_PCI to the || chain?

Sure.

Is PCIe the only other transport over which the register can be accessed?
Or can this also be done over e.g. SPI, like on Ocelot[1]?

[1] https://lore.kernel.org/linux-gpio/20200511145329.GV34497@piout.net/

Thanks!

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ