[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <b717d5cd-e40d-c86a-05de-a512a5e3b0af@intel.com>
Date: Wed, 10 Feb 2021 07:22:03 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Peter Zijlstra <peterz@...radead.org>,
Alison Schofield <alison.schofield@...el.com>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...nel.org>, Borislav Petkov <bp@...en8.de>,
x86@...nel.org, linux-kernel@...r.kernel.org,
Dave Hansen <dave.hansen@...ux.intel.com>,
Tony Luck <tony.luck@...el.com>,
Tim Chen <tim.c.chen@...ux.intel.com>,
"H. Peter Anvin" <hpa@...ux.intel.com>,
David Rientjes <rientjes@...gle.com>,
Igor Mammedov <imammedo@...hat.com>,
Prarit Bhargava <prarit@...hat.com>, brice.goglin@...il.com
Subject: Re: [PATCH] x86, sched: Allow NUMA nodes to share an LLC on Intel
platforms
On 2/10/21 12:05 AM, Peter Zijlstra wrote:
>> + if (IS_ENABLED(CONFIG_NUMA))
>> + set_cpu_bug(c, X86_BUG_NUMA_SHARES_LLC);
>> }
> This seens wrong too, it shouldn't be allowed pre SKX. And ideally only
> be allowed when SNC is enabled.
Originally, this just added a few more models to the list of CPUs with
SNC. I was hoping for something a bit more durable that we wouldn't
have to go back and poke at every year or two.
> Please make this more specific than: all Intel CPUs. Ofcourse, since you
> all knew this was an issue, you could've made it discoverable
> _somewhere_ :-(
You're totally right, of course. The hardware could enumerate SNC as a
feature explicitly somewhere. But, that's a little silly because all of
the information that it's enumerating about the CPU caches and NUMA
nodes present and correct is *correct*. The secondary information would
only be for the CPU to say, "yeah, I'm really sure about that other stuff".
I think this sanity check has outlived its usefulness.
Powered by blists - more mailing lists