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Message-Id: <37a2d6c2-9a56-429e-addc-3e52dd49abc9@www.fastmail.com>
Date:   Wed, 10 Feb 2021 19:18:25 +0800
From:   "Jiaxun Yang" <jiaxun.yang@...goat.com>
To:     "Qing Zhang" <zhangqing@...ngson.cn>,
        "Rob Herring" <robh+dt@...nel.org>,
        "Thomas Bogendoerfer" <tsbogend@...ha.franken.de>,
        "Thomas Gleixner" <tglx@...utronix.de>,
        "Marc Zyngier" <maz@...nel.org>,
        "Huacai Chen" <chenhuacai@...nel.org>
Cc:     devicetree@...r.kernel.org,
        "linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
        linux-kernel@...r.kernel.org,
        "Xingxing Su" <suxingxing@...ngson.cn>
Subject: Re: [PATCH 4/6] MIPS: Loongson64: Add 2K1000 early_printk_port



On Tue, Feb 9, 2021, at 5:32 PM, Qing Zhang wrote:
> Distinguish between 3A series CPU and 2K1000 CPU UART0.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@...goat.com>
> Signed-off-by: Qing Zhang <zhangqing@...ngson.cn>
> Signed-off-by: Xingxing Su <suxingxing@...ngson.cn>

Personally I don't like this kind of quirk.
Probably we should use earlycon as Arm later.

- Jiaxun

> ---
>  arch/mips/loongson64/init.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/mips/loongson64/init.c b/arch/mips/loongson64/init.c
> index 8bef1ebab72d..a8ad02d8d088 100644
> --- a/arch/mips/loongson64/init.c
> +++ b/arch/mips/loongson64/init.c
> @@ -120,7 +120,10 @@ void __init prom_init(void)
>  #endif
>  
>  	/* Hardcode to CPU UART 0 */
> -	setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE + 0x1e0), 0, 1024);
> +	if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64R)
> +		setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE), 0, 1024);
> +	else
> +		setup_8250_early_printk_port(TO_UNCAC(LOONGSON_REG_BASE + 0x1e0), 0, 1024);
>  
>  	register_smp_ops(&loongson3_smp_ops);
>  	board_nmi_handler_setup = mips_nmi_setup;
> -- 
> 2.20.1
> 
>

-- 
- Jiaxun

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