linux-kernel - [PATCH 11/13] arm64: dts: qcom: sc7280: Add APSS watchdog node

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Message-Id: <1613114930-1661-12-git-send-email-rnayak@codeaurora.org>
Date:   Fri, 12 Feb 2021 12:58:48 +0530
From:   Rajendra Nayak <rnayak@...eaurora.org>
To:     agross@...nel.org, bjorn.andersson@...aro.org, robh+dt@...nel.org
Cc:     linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>,
        Rajendra Nayak <rnayak@...eaurora.org>
Subject: [PATCH 11/13] arm64: dts: qcom: sc7280: Add APSS watchdog node

From: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>

Add APSS (Application Processor Subsystem) watchdog
DT node for SC7280 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@...eaurora.org>
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index b5b9b6a..ef82d77 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -399,6 +399,13 @@
 			};
 		};
 
+		watchdog@...10000 {
+			compatible = "qcom,apss-wdt-sc7280", "qcom,kpss-wdt";
+			reg = <0 0x17c10000 0 0x1000>;
+			clocks = <&sleep_clk>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		timer@...20000 {
 			#address-cells = <2>;
 			#size-cells = <2>;
-- 
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