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Message-Id: <20210212163729.69882-1-krzk@kernel.org>
Date: Fri, 12 Feb 2021 17:37:29 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Krzysztof Kozlowski <krzk@...nel.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Rob Herring <robh+dt@...nel.org>
Subject: [PATCH] arm64: dts: exynos: re-order Slim SSS clocks to match dtschema
The dtschema expects pclk (APB clock) followed by aclk (AXI/AHB clock):
arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml:
slim-sss@...40000: clock-names:0: 'pclk' was expected
arch/arm64/boot/dts/exynos/exynos5433-tm2.dt.yaml:
slim-sss@...40000: clock-names:1: 'aclk' was expected
Signed-off-by: Krzysztof Kozlowski <krzk@...nel.org>
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 6433f9ee35e1..18a912eee360 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -564,9 +564,9 @@ slim_sss: slim-sss@...40000 {
compatible = "samsung,exynos5433-slim-sss";
reg = <0x11140000 0x1000>;
interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "aclk", "pclk";
- clocks = <&cmu_imem CLK_ACLK_SLIMSSS>,
- <&cmu_imem CLK_PCLK_SLIMSSS>;
+ clock-names = "pclk", "aclk";
+ clocks = <&cmu_imem CLK_PCLK_SLIMSSS>,
+ <&cmu_imem CLK_ACLK_SLIMSSS>;
};
pd_gscl: power-domain@...c4000 {
--
2.25.1
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