linux-kernel - [PATCH v2 2/4] devicetree/bindings: add support for CP110 UTMI driver

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Message-ID: <20210214160108.3879-3-kostap@marvell.com>
Date:   Sun, 14 Feb 2021 18:01:06 +0200
From:   <kostap@...vell.com>
To:     <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC:     <lkundrak@...sk>, <linux@...linux.org.uk>,
        <sebastian.hesselbarth@...il.com>, <gregory.clement@...tlin.com>,
        <andrew@...n.ch>, <robh+dt@...nel.org>, <vkoul@...nel.org>,
        <kishon@...com>, <miquel.raynal@...tlin.com>, <mw@...ihalf.com>,
        <jaz@...ihalf.com>, <nadavh@...vell.com>, <stefanc@...vell.com>,
        <bpeled@...vell.com>, "Konstantin Porotchkin" <kostap@...vell.com>
Subject: [PATCH v2 2/4] devicetree/bindings: add support for CP110 UTMI driver

From: Konstantin Porotchkin <kostap@...vell.com>

Add DTS binding for Marvell CP110 UTMI driver

Signed-off-by: Konstantin Porotchkin <kostap@...vell.com>
---
 Documentation/devicetree/bindings/phy/phy-mvebu-utmi.txt | 78 ++++++++++++++++++--
 1 file changed, 72 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/phy-mvebu-utmi.txt b/Documentation/devicetree/bindings/phy/phy-mvebu-utmi.txt
index aa99ceec73b0..b66066249861 100644
--- a/Documentation/devicetree/bindings/phy/phy-mvebu-utmi.txt
+++ b/Documentation/devicetree/bindings/phy/phy-mvebu-utmi.txt
@@ -1,30 +1,56 @@
-MVEBU A3700 UTMI PHY
---------------------
+MVEBU UTMI PHY
+---------------
 
 USB2 UTMI+ PHY controllers can be found on the following Marvell MVEBU SoCs:
 * Armada 3700
+* Armada 7k/8k (on the CP110)
+* Armada CN913x (on the CP115)
 
 On Armada 3700, there are two USB controllers, one is compatible with the USB2
 and USB3 specifications and supports OTG. The other one is USB2 compliant and
 only supports host mode. Both of these controllers come with a slightly
 different UTMI PHY.
 
+On Armada 7k/8k and CN913x, there are two host and one device USB controllers.
+Each of two exiting UTMI PHYs could be connected to either USB host or USB device
+controller.
+The USB device controller can only be connected to a single UTMI PHY port:
+                    0.H----- USB HOST0
+UTMI PHY0  --------/
+                    0.D-----0
+                             \------ USB DEVICE
+                    1.D-----1
+UTMI PHY1  --------\
+                    1.H----- USB HOST1
+
+
 Required Properties:
 
 - compatible: Should be one of:
 	      * "marvell,a3700-utmi-host-phy" for the PHY connected to
-	        the USB2 host-only controller.
+	        the USB2 host-only controller (for Armada3700 only).
 	      * "marvell,a3700-utmi-otg-phy" for the PHY connected to
-	        the USB3 and USB2 OTG capable controller.
+	        the USB3 and USB2 OTG capable controller (for Armada3700 only.
+	      * "marvell,cp110-utmi-phy" (for Armada 7k/8k or CN913x only).
 - reg: PHY IP register range.
 - marvell,usb-misc-reg: handle on the "USB miscellaneous registers" shared
 			region covering registers related to both the host
-			controller and the PHY.
-- #phy-cells: Standard property (Documentation: phy-bindings.txt) Should be 0.
+			controller and the PHY (for Armada3700 only).
+- marvell,system-controller: should contain a phandle to the system
+			     controller node (for Armada 7k/8k or CN913x only)
+- #phy-cells: Standard property (Documentation: phy-bindings.txt.
+		Should be 0 (for Armada3700 only).
+
+
+Required properties (child nodes, for Armada 7k/8k/CN913x only):
+
+- reg: UTMI PHY port ID (0 or 1).
+- #phy-cells : Should be 0.
 
 
 Example:
 
+Armada3700
 	usb2_utmi_host_phy: phy@...00 {
 		compatible = "marvell,armada-3700-utmi-host-phy";
 		reg = <0x5f000 0x800>;
@@ -36,3 +62,43 @@ Example:
 		compatible = "marvell,armada-3700-usb2-host-misc", "syscon";
 		reg = <0x5f800 0x800>;
 	};
+
+Armada 7k/8k/CN913x
+
+	cp0_utmi: utmi@...000 {
+		compatible = "marvell,cp110-utmi-phy";
+		reg = <0x580000 0x2000>;
+		marvell,system-controller = <&cp0_syscon0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+
+		cp0_utmi0: phy@0 {
+			reg = <0>;
+			#phy-cells = <0>;
+		};
+
+		cp0_utmi1: phy@1 {
+			reg = <1>;
+			#phy-cells = <0>;
+		};
+	};
+
+	cp0_usb3_0 {
+		status = "okay";
+		usb-phy = <&cp0_usb3_0_phy0>;
+		phys = <&cp0_utmi0>;
+		phy-names = "utmi";
+		/* UTMI0 is connected to USB host controller (default mode) */
+		dr_mode = "host";
+	};
+
+	cp0_usb3_1 {
+		status = "okay";
+		usb-phy = <&cp0_usb3_0_phy1>;
+		phys = <&cp0_utmi1>;
+		phy-names = "utmi";
+		/* UTMI1 is connected to USB device controller */
+		dr_mode = "peripheral";
+	};
+
-- 
2.17.1