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Message-ID: <161333473746.1254594.8116415179063395207@swboyd.mtv.corp.google.com>
Date: Sun, 14 Feb 2021 12:32:17 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: Daniel Palmer <daniel@...f.com>, devicetree@...r.kernel.org,
linux-clk@...r.kernel.org
Cc: w@....eu, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Daniel Palmer <daniel@...f.com>
Subject: Re: [PATCH v2 4/7] clk: mstar: MStar/SigmaStar MPLL driver
Quoting Daniel Palmer (2021-02-10 21:22:03)
> This adds a basic driver for the MPLL block found in MStar/SigmaStar
> ARMv7 SoCs.
>
> Currently this driver is only good for calculating the rates of it's
> outputs and the actual configuration must be done before the kernel
> boots. Usually this is done even before u-boot starts.
>
> This driver targets the MPLL block found in the MSC313/MSC313E but
> there is no documentation this chip so the register descriptions for
> the another MStar chip the MST786 were used as they seem to match.
>
> Signed-off-by: Daniel Palmer <daniel@...f.com>
> ---
Applied to clk-next
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