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Message-Id: <cover.1613468366.git.saiprakash.ranjan@codeaurora.org>
Date:   Tue, 16 Feb 2021 15:17:46 +0530
From:   Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>
Cc:     Vinod Koul <vkoul@...nel.org>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-arm-msm@...r.kernel.org,
        Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
Subject: [PATCH 0/3] arm64: dts: qcom: Fix PMU and timer interrupt properties

Fix PMU interrupt polarity for SM8250 and SM8350 SoCs and the timer
interrupt property for SM8250 SoC.

Sai Prakash Ranjan (3):
  arm64: dts: qcom: sm8250: Fix level triggered PMU interrupt polarity
  arm64: dts: qcom: sm8350: Fix level triggered PMU interrupt polarity
  arm64: dts: qcom: sm8250: Fix timer interrupt to specify EL2 physical
    timer

 arch/arm64/boot/dts/qcom/sm8250.dtsi | 4 ++--
 arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)


base-commit: d79b47c59576a51d8e288a6b98b75ccf4afb8acd
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
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