linux-kernel - Re: [PATCH] i2c: exynos5: Preserve high speed master code

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 16 Feb 2021 23:09:33 +0100
From:   Marten Lindahl <martenli@...s.com>
To:     Krzysztof Kozlowski <krzk@...nel.org>
CC:     <linux-i2c@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-samsung-soc@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <kernel@...s.com>
Subject: Re: [PATCH] i2c: exynos5: Preserve high speed master code

Hi Krzysztof!

Thank you for your comments! Please see my reply below.
I will send v2 in a moment.

On Tue, Feb 16, 2021 at 08:51:41AM +0100, Krzysztof Kozlowski wrote:
> On Mon, Feb 15, 2021 at 08:03:21PM +0100, Mårten Lindahl wrote:
> > From: Mårten Lindahl <martenli@...s.com>
> > 
> > When the controller starts to send a message with the MASTER_ID field
> > set (high speed), the whole I2C_ADDR register is overwritten including
> > MASTER_ID as the SLV_ADDR_MAS field is set.
> 
> Are you here describing bug in driver or hardware (the controller?)?
> Looking at the code, I think the driver, but description got me
> confused.
> 

Yes, it is the driver. I will change.

> > 
> > This patch preserves already written fields in I2C_ADDR when writing
> > SLV_ADDR_MAS.
> > 
> > Signed-off-by: Mårten Lindahl <martenli@...s.com>
> > ---
> >  drivers/i2c/busses/i2c-exynos5.c | 8 +++++++-
> >  1 file changed, 7 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c
> > index 20a9881a0d6c..f2d04c241299 100644
> > --- a/drivers/i2c/busses/i2c-exynos5.c
> > +++ b/drivers/i2c/busses/i2c-exynos5.c
> > @@ -606,6 +606,7 @@ static void exynos5_i2c_message_start(struct exynos5_i2c *i2c, int stop)
> >  	u32 i2c_ctl;
> >  	u32 int_en = 0;
> >  	u32 i2c_auto_conf = 0;
> > +	u32 i2c_addr = 0;
> >  	u32 fifo_ctl;
> >  	unsigned long flags;
> >  	unsigned short trig_lvl;
> > @@ -640,7 +641,12 @@ static void exynos5_i2c_message_start(struct exynos5_i2c *i2c, int stop)
> >  		int_en |= HSI2C_INT_TX_ALMOSTEMPTY_EN;
> >  	}
> >  
> > -	writel(HSI2C_SLV_ADDR_MAS(i2c->msg->addr), i2c->regs + HSI2C_ADDR);
> > +	i2c_addr = HSI2C_SLV_ADDR_MAS(i2c->msg->addr);
> > +
> > +	if (i2c->op_clock >= I2C_MAX_FAST_MODE_PLUS_FREQ)
> > +		i2c_addr |= readl(i2c->regs + HSI2C_ADDR);
> 
> Any reason why not "|= MASTER_ID(i2c->adap.nr)" here instead of more
> expensive IO read? It's quite important because your current code will
> bitwise-or old I2C slave address with a new one... This should break
> during tests with multiple I2C slave devices, shouldn't it?
> 

You are correct. It is better to use the macro instead, and yes,
safer too. I only have one device that supports high speed i2c, but
I get your point. It could potentially break.

> On which HW did you test it?

I used an Artpec development board as master and INA230EVM board
as slave.

> 
> Best regards,
> Krzysztof
> 

Best regards
Mårten
> 
> > +
> > +	writel(i2c_addr, i2c->regs + HSI2C_ADDR);