linux-kernel - Re: [PATCH] i2c: exynos5: Preserve high speed master code

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Wed, 17 Feb 2021 09:43:42 +0100
From:   Krzysztof Kozlowski <krzk@...nel.org>
To:     Jesper Nilsson <jesper.nilsson@...s.com>
Cc:     Mårten Lindahl <Marten.Lindahl@...s.com>,
        "linux-samsung-soc@...r.kernel.org" 
        <linux-samsung-soc@...r.kernel.org>, kernel <kernel@...s.com>,
        "linux-i2c@...r.kernel.org" <linux-i2c@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] i2c: exynos5: Preserve high speed master code

On Wed, Feb 17, 2021 at 09:32:11AM +0100, Jesper Nilsson wrote:
> On Wed, Feb 17, 2021 at 09:07:47AM +0100, Krzysztof Kozlowski wrote:
> > On Tue, Feb 16, 2021 at 11:09:33PM +0100, Marten Lindahl wrote:
> > > > Any reason why not "|= MASTER_ID(i2c->adap.nr)" here instead of more
> > > > expensive IO read? It's quite important because your current code will
> > > > bitwise-or old I2C slave address with a new one... This should break
> > > > during tests with multiple I2C slave devices, shouldn't it?
> > > > 
> > > 
> > > You are correct. It is better to use the macro instead, and yes,
> > > safer too. I only have one device that supports high speed i2c, but
> > > I get your point. It could potentially break.
> > > 
> > > > On which HW did you test it?
> > > 
> > > I used an Artpec development board as master and INA230EVM board
> > > as slave.
> > 
> > Artpec development board with? What SoC?
> 
> The ARTPEC-line of SoC:s are Axis Communications own ASICs, in the latest iteration
> it's a Cortex-53 and includes instances of the exynos5 HSI2C ip.

Cool! Good to see that this code is re-used. :)

Best regards,
Krzysztof