linux-kernel - Re: [PATCH] clk: sunxi-ng: v3s: add support for variable rate audio pll output

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Message-ID: <20210218075835.o43tyarpimrcwbvk@gilmour>
Date:   Thu, 18 Feb 2021 08:58:35 +0100
From:   Maxime Ripard <maxime@...no.tech>
To:     Tobias Schramm <t.schramm@...jaro.org>
Cc:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Icenowy Zheng <icenowy@...c.io>, Chen-Yu Tsai <wens@...e.org>,
        Jernej Skrabec <jernej.skrabec@...l.net>,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: sunxi-ng: v3s: add support for variable rate audio
 pll output

Hi,

On Fri, Feb 12, 2021 at 02:57:25PM +0100, Tobias Schramm wrote:
> Previously the variable rate audio pll output was fixed to a divider of
> four. This is unfortunately incompatible with generating commonly used
> I2S core clock rates like 24.576MHz from the 24MHz parent clock.
> This commit adds support for arbitrary audio pll output dividers to fix
> that.
> 
> Signed-off-by: Tobias Schramm <t.schramm@...jaro.org>

It's not really clear to me how that would help.

The closest frequency we can provide for 24.576MHz would be 24580645 Hz,
with N = 127, M = 31 and P = 4, so it would work with what we have
already?

Maxime

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