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Message-Id: <1613750416-11901-17-git-send-email-abel.vesa@nxp.com>
Date: Fri, 19 Feb 2021 18:00:13 +0200
From: Abel Vesa <abel.vesa@....com>
To: Rob Herring <robh@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <kernel@...gutronix.de>,
Lucas Stach <l.stach@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Chanwoo Choi <cw00.choi@...sung.com>,
Georgi Djakov <djakov@...nel.org>,
Dong Aisheng <aisheng.dong@....com>,
Peng Fan <peng.fan@....com>,
Martin Kepplinger <martink@...teo.de>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-clk@...r.kernel.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Cc: NXP Linux Team <linux-imx@....com>, Abel Vesa <abel.vesa@....com>
Subject: [RFC 16/19] arm64: dts: imx8mq: Add the interconnect node
The icc node will be probed by the imx8mq interconnect driver.
Will look-up the NoC and all the pl301s (identified by fsl,icc-id property)
and will assign the corresponding icc node to each one of them.
Then, it will register the icc provider.
Signed-off-by: Abel Vesa <abel.vesa@....com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 5f9ffa465d6c..6a64b4bf31f5 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1627,5 +1627,10 @@ opp-133M {
};
};
};
+
+ icc: interconnect@0 {
+ compatible = "fsl,imx8mq-icc", "fsl,imx8m-icc";
+ #interconnect-cells = <1>;
+ };
};
};
--
2.29.2
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