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Message-ID: <CAAOTY_92-Kw+BFnxgQbh2zFT5hDBAF+uZe+_VgCd4NAziQ0wUg@mail.gmail.com>
Date: Mon, 22 Feb 2021 07:55:10 +0800
From: Chun-Kuang Hu <chunkuang.hu@...nel.org>
To: Yongqiang Niu <yongqiang.niu@...iatek.com>
Cc: CK Hu <ck.hu@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
DRI Development <dri-devel@...ts.freedesktop.org>,
DTML <devicetree@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>,
Project_Global_Chrome_Upstream_Group@...iatek.com,
Hsin-Yi Wang <hsinyi@...omium.org>,
Chun-Kuang Hu <chunkuang.hu@...nel.org>
Subject: Re: [PATCH v1] drm/mediatek: move page flip handle into cmdq cb
Hi, Yongqiang:
Yongqiang Niu <yongqiang.niu@...iatek.com> 於 2021年2月19日 週五 下午5:54寫道:
>
> move page flip handle into cmdq cb
> irq callback will before cmdq flush ddp register
> into hardware, that will cause the display frame page
> flip event before it realy display out time
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@...iatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 33 +++++++++++++++++++++++++++++----
> 1 file changed, 29 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> index bdd37ea..bece327 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> @@ -72,6 +72,13 @@ struct mtk_crtc_state {
> unsigned int pending_vrefresh;
> };
>
> +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> +struct mtk_cmdq_cb_data {
> + struct cmdq_pkt *cmdq_handle;
> + struct mtk_drm_crtc *mtk_crtc;
> +};
> +#endif
> +
> static inline struct mtk_drm_crtc *to_mtk_crtc(struct drm_crtc *c)
> {
> return container_of(c, struct mtk_drm_crtc, base);
> @@ -96,7 +103,6 @@ static void mtk_drm_crtc_finish_page_flip(struct mtk_drm_crtc *mtk_crtc)
>
> static void mtk_drm_finish_page_flip(struct mtk_drm_crtc *mtk_crtc)
> {
> - drm_crtc_handle_vblank(&mtk_crtc->base);
> if (mtk_crtc->pending_needs_vblank) {
> mtk_drm_crtc_finish_page_flip(mtk_crtc);
> mtk_crtc->pending_needs_vblank = false;
> @@ -241,7 +247,19 @@ struct mtk_ddp_comp *mtk_drm_ddp_comp_for_plane(struct drm_crtc *crtc,
> #if IS_REACHABLE(CONFIG_MTK_CMDQ)
> static void ddp_cmdq_cb(struct cmdq_cb_data data)
> {
> - cmdq_pkt_destroy(data.data);
> + struct mtk_cmdq_cb_data *cb_data = data.data;
> +
> + if (cb_data) {
> + struct mtk_drm_crtc *mtk_crtc = cb_data->mtk_crtc;
> +
> + if (mtk_crtc)
> + mtk_drm_finish_page_flip(mtk_crtc);
> +
> + if (cb_data->cmdq_handle)
> + cmdq_pkt_destroy(cb_data->cmdq_handle);
> +
> + kfree(cb_data);
> + }
> }
> #endif
>
> @@ -481,13 +499,20 @@ static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc *mtk_crtc)
> }
> #if IS_REACHABLE(CONFIG_MTK_CMDQ)
> if (mtk_crtc->cmdq_client) {
> + struct mtk_cmdq_cb_data *cb_data;
> +
> mbox_flush(mtk_crtc->cmdq_client->chan, 2000);
> cmdq_handle = cmdq_pkt_create(mtk_crtc->cmdq_client, PAGE_SIZE);
> cmdq_pkt_clear_event(cmdq_handle, mtk_crtc->cmdq_event);
> cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false);
> mtk_crtc_ddp_config(crtc, cmdq_handle);
> cmdq_pkt_finalize(cmdq_handle);
> - cmdq_pkt_flush_async(cmdq_handle, ddp_cmdq_cb, cmdq_handle);
> +
> + cb_data = kmalloc(sizeof(*cb_data), GFP_KERNEL);
> + cb_data->cmdq_handle = cmdq_handle;
> + cb_data->mtk_crtc = mtk_crtc;
> +
> + cmdq_pkt_flush_async(cmdq_handle, ddp_cmdq_cb, cb_data);
> }
> #endif
> mutex_unlock(&mtk_crtc->hw_lock);
> @@ -674,7 +699,7 @@ void mtk_crtc_ddp_irq(struct drm_crtc *crtc, struct mtk_ddp_comp *comp)
> #endif
> mtk_crtc_ddp_config(crtc, NULL);
>
> - mtk_drm_finish_page_flip(mtk_crtc);
> + drm_crtc_handle_vblank(&mtk_crtc->base);
For CPU and shadow register case, where to handle page flip?
The correct sequence should be:
1. set pending_needs_vblank to true
2. mtk_drm_crtc_hw_config
3. irq comes, handle page flip, and set pending_needs_vblank to false
But now irq comes before 2, so this patch want to fix this bug.
I think shadow register also have this problem. The control flow of
shadow register is similar to cmdq, so I would like to fix both
problem in the same way.
Regards,
Chun-Kuang.
> }
>
> static int mtk_drm_crtc_num_comp_planes(struct mtk_drm_crtc *mtk_crtc,
> --
> 1.8.1.1.dirty
>
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