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Message-ID: <20210222100106.0ae8380e@jacob-builder>
Date: Mon, 22 Feb 2021 10:01:06 -0800
From: Jacob Pan <jacob.jun.pan@...ux.intel.com>
To: "Tian, Kevin" <kevin.tian@...el.com>
Cc: LKML <linux-kernel@...r.kernel.org>,
"iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
Joerg Roedel <joro@...tes.org>,
Lu Baolu <baolu.lu@...ux.intel.com>,
"Liu, Yi L" <yi.l.liu@...el.com>,
"Raj, Ashok" <ashok.raj@...el.com>, "Wu, Hao" <hao.wu@...el.com>,
"Sun, Yi Y" <yi.y.sun@...el.com>,
"Jiang, Dave" <dave.jiang@...el.com>,
Eric Auger <eric.auger@...hat.com>,
Jean-Philippe Brucker <jean-philippe@...aro.com>,
"Kumar, Sanjay K" <sanjay.k.kumar@...el.com>,
jacob.jun.pan@...ux.intel.com
Subject: Re: [PATCH 2/4] iommu/vt-d: Enable write protect propagation from
guest
Hi Kevin,
On Sat, 20 Feb 2021 02:38:02 +0000, "Tian, Kevin" <kevin.tian@...el.com>
wrote:
> > From: Jacob Pan <jacob.jun.pan@...ux.intel.com>
> > Sent: Saturday, February 20, 2021 1:09 AM
> >
> > Hi Kevin,
> >
> > On Fri, 19 Feb 2021 06:19:04 +0000, "Tian, Kevin" <kevin.tian@...el.com>
> > wrote:
> >
> > > > From: Jacob Pan <jacob.jun.pan@...ux.intel.com>
> > > > Sent: Friday, February 19, 2021 5:31 AM
> > > >
> > > > Write protect bit, when set, inhibits supervisor writes to the
> > > > read-only pages. In guest supervisor shared virtual addressing
> > > > (SVA), write-protect should be honored upon guest bind supervisor
> > > > PASID request.
> > > >
> > > > This patch extends the VT-d portion of the IOMMU UAPI to include WP
> > > > bit. WPE bit of the supervisor PASID entry will be set to match
> > > > CPU CR0.WP bit.
> > > >
> > > > Signed-off-by: Sanjay Kumar <sanjay.k.kumar@...el.com>
> > > > Signed-off-by: Jacob Pan <jacob.jun.pan@...ux.intel.com>
> > > > ---
> > > > drivers/iommu/intel/pasid.c | 5 +++++
> > > > include/uapi/linux/iommu.h | 3 ++-
> > > > 2 files changed, 7 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/iommu/intel/pasid.c
> > > > b/drivers/iommu/intel/pasid.c index 0b7e0e726ade..c7a2ec930af4
> > > > 100644 --- a/drivers/iommu/intel/pasid.c
> > > > +++ b/drivers/iommu/intel/pasid.c
> > > > @@ -763,6 +763,11 @@ intel_pasid_setup_bind_data(struct
> > intel_iommu
> > > > *iommu, struct pasid_entry *pte,
> > > > return -EINVAL;
> > > > }
> > > > pasid_set_sre(pte);
> > > > + /* Enable write protect WP if guest requested */
> > > > + if (pasid_data->flags & IOMMU_SVA_VTD_GPASID_WPE) {
> > > > + if (pasid_enable_wpe(pte))
> > > > + return -EINVAL;
> > >
> > > We should call pasid_set_wpe directly, as this binding is about guest
> > > page table and suppose the guest has done whatever check required
> > > (e.g. gcr0.wp) before setting this bit. pasid_enable_wpe has an
> > > additional check on host cr0.wp thus is logically incorrect here.
> > >
> > If the host CPU does not support WP, can guest VCPU still support WP? If
> > so, I agree.
> >
>
> If you change 'support' to 'enable', then the answer is yes.
I agree, thanks for explaining. Will change it to pasid_set_wpe.
Thanks,
Jacob
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