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Message-ID: <f1f9f159-d9c4-c03e-2297-84b5aab28447@redhat.com>
Date:   Tue, 23 Feb 2021 18:06:10 +0100
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Sean Christopherson <seanjc@...gle.com>,
        Like Xu <like.xu@...ux.intel.com>
Cc:     Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Jim Mattson <jmattson@...gle.com>,
        Joerg Roedel <joro@...tes.org>, kvm@...r.kernel.org,
        x86@...nel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] KVM: vmx/pmu: Clear DEBUGCTLMSR_LBR bit on the debug
 breakpoint event

On 23/02/21 17:38, Sean Christopherson wrote:
> On Tue, Feb 23, 2021, Like Xu wrote:
>> When the processor that support model-specific LBR generates a debug
>> breakpoint event, it automatically clears the LBR flag. This action
>> does not clear previously stored LBR stack MSRs. (Intel SDM 17.4.2)
>>
>> Signed-off-by: Like Xu <like.xu@...ux.intel.com>
>> ---
>>   arch/x86/kvm/vmx/vmx.c | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
>> index e0a3a9be654b..4951b535eb7f 100644
>> --- a/arch/x86/kvm/vmx/vmx.c
>> +++ b/arch/x86/kvm/vmx/vmx.c
>> @@ -4795,6 +4795,7 @@ static int handle_exception_nmi(struct kvm_vcpu *vcpu)
>>   	u32 intr_info, ex_no, error_code;
>>   	unsigned long cr2, rip, dr6;
>>   	u32 vect_info;
>> +	u64 lbr_ctl;
>>   
>>   	vect_info = vmx->idt_vectoring_info;
>>   	intr_info = vmx_get_intr_info(vcpu);
>> @@ -4886,6 +4887,10 @@ static int handle_exception_nmi(struct kvm_vcpu *vcpu)
>>   		rip = kvm_rip_read(vcpu);
>>   		kvm_run->debug.arch.pc = vmcs_readl(GUEST_CS_BASE) + rip;
>>   		kvm_run->debug.arch.exception = ex_no;
>> +		/* On the debug breakpoint event, the LBREn bit is cleared. */
> 
> Except this code is in BP_VECTOR, not DB_VECTOR as it should be.
> 
>    When the processor generates a debug exception (#DB), it automatically clears
>    the LBR flag before executing the exception handler. This action does not
>    clear previously stored LBR stack MSRs.

Also, this should come with a testcase.

Paolo

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