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Message-ID: <7de8507d-82dd-291e-1f63-7c1460e6a6b2@gmail.com>
Date: Tue, 23 Feb 2021 19:43:29 -0800
From: Florian Fainelli <f.fainelli@...il.com>
To: Álvaro Fernández Rojas <noltari@...il.com>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Jonas Gorski <jonas.gorski@...il.com>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
bcm-kernel-feedback-list@...adcom.com, linux-mips@...r.kernel.org
Subject: Re: [PATCH v2 2/2] irqchip: add support for BCM6345 external
interrupt controller
On 2/23/2021 12:43 PM, Álvaro Fernández Rojas wrote:
> This interrupt controller is present on bcm63xx SoCs in order to generate
> interrupts based on GPIO status changes.
>
> Signed-off-by: Álvaro Fernández Rojas <noltari@...il.com>
> Signed-off-by: Jonas Gorski <jonas.gorski@...il.com>
> ---
[snip]
> +static int __init bcm6345_ext_intc_of_init(struct device_node *node,
> + struct device_node *parent)
> +{
> + int num_irqs, ret = -EINVAL;
> + unsigned i;
> + void __iomem *base;
> + int irqs[MAX_IRQS] = { 0 };
> + u32 shift;
> + bool toggle_clear_on_ack = false;
> +
> + num_irqs = of_irq_count(node);
> +
> + if (!num_irqs || num_irqs > MAX_IRQS)
> + return -EINVAL;
> +
> + if (of_property_read_u32(node, "brcm,field-width", &shift))
> + shift = 4;
This property is not documented in the binding, other than that:
Reviewed-by: Florian Fainelli <f.fainelli@...il.com>
--
Florian
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