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Message-ID: <CAFqH_50BWF4sQnJAnVZDf3Dbuw+LaN67q39DvOh7ipzqNeNEMw@mail.gmail.com>
Date: Wed, 24 Feb 2021 11:30:14 +0100
From: Enric Balletbo Serra <eballetbo@...il.com>
To: Ikjoon Jang <ikjn@...omium.org>
Cc: "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>,
Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Weiyi Lu <weiyi.lu@...iatek.com>
Subject: Re: [PATCH] arm64: dts: mt8183: Add power-domains properity to mfgcfg
Hi Ikjoon,
Thank you for your patch.
Missatge de Ikjoon Jang <ikjn@...omium.org> del dia dc., 24 de febr.
2021 a les 10:21:
>
> mfgcfg clock is under MFG_ASYNC power domain
>
> Signed-off-by: Weiyi Lu <weiyi.lu@...iatek.com>
> Signed-off-by: Ikjoon Jang <ikjn@...omium.org>
> ---
>
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 5b782a4769e7..3384df5284c0 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -962,6 +962,7 @@ mfgcfg: syscon@...00000 {
> compatible = "mediatek,mt8183-mfgcfg", "syscon";
> reg = <0 0x13000000 0 0x1000>;
> #clock-cells = <1>;
> + power-domains = <&scpsys MT8183_POWER_DOMAIN_MFG_ASYNC>;
I don't think this will work in mainline, at least, the reference name
should be &spm
Thanks,
Enric
> };
>
> mmsys: syscon@...00000 {
> --
> 2.30.0.617.g56c4b15f3c-goog
>
>
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> Linux-mediatek mailing list
> Linux-mediatek@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
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