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Message-Id: <20210225164216.21124-8-noltari@gmail.com>
Date: Thu, 25 Feb 2021 17:42:11 +0100
From: Álvaro Fernández Rojas
<noltari@...il.com>
To: f.fainelli@...il.com, Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Álvaro Fernández Rojas
<noltari@...il.com>, Jonas Gorski <jonas.gorski@...il.com>,
Necip Fazil Yildiran <fazilyildiran@...il.com>,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 07/12] Documentation: add BCM6368 pincontroller binding documentation
Add binding documentation for the pincontrol core found in BCM6368 SoCs.
Signed-off-by: Álvaro Fernández Rojas <noltari@...il.com>
Signed-off-by: Jonas Gorski <jonas.gorski@...il.com>
---
.../pinctrl/brcm,bcm6368-pinctrl.yaml | 255 ++++++++++++++++++
1 file changed, 255 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml
diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml
new file mode 100644
index 000000000000..1f69baef6e40
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml
@@ -0,0 +1,255 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/brcm,bcm6368-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM6368 pin controller
+
+maintainers:
+ - Álvaro Fernández Rojas <noltari@...il.com>
+ - Jonas Gorski <jonas.gorski@...il.com>
+
+description: |+
+ The pin controller node should be the child of a syscon node.
+
+ Refer to the bindings described in
+ Documentation/devicetree/bindings/mfd/syscon.yaml
+
+properties:
+ compatible:
+ const: brcm,bcm6368-pinctrl
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ description:
+ Specifies the pin number and flags, as defined in
+ include/dt-bindings/gpio/gpio.h
+ const: 2
+
+ interrupts-extended:
+ description:
+ One interrupt per each of the 6 GPIO ports supported by the controller,
+ sorted by port number ascending order.
+ minItems: 6
+ maxItems: 6
+
+patternProperties:
+ '^.*$':
+ if:
+ type: object
+ then:
+ properties:
+ function:
+ $ref: "/schemas/types.yaml#/definitions/string"
+ enum: [ analog_afe_0, analog_afe_1, sys_irq, serial_led_data,
+ serial_led_clk, inet_led, ephy0_led, ephy1_led, ephy2_led,
+ ephy3_led, robosw_led_data, robosw_led_clk, robosw_led0,
+ robosw_led1, usb_device_led, pci_req1, pci_gnt1, pci_intb,
+ pci_req0, pci_gnt0, pcmcia_cd1, pcmcia_cd2, pcmcia_vs1,
+ pcmcia_vs2, ebi_cs2, ebi_cs3, spi_cs2, spi_cs3, spi_cs4,
+ spi_cs5, uart1 ]
+
+ pins:
+ $ref: "/schemas/types.yaml#/definitions/string"
+ enum: [ gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7,
+ gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio14,
+ gpio16, gpio17, gpio18, gpio19, gpio20, gpio22, gpio23,
+ gpio24, gpio25, gpio26, gpio27, gpio28, gpio29, gpio30,
+ gpio31, uart1_grp ]
+
+required:
+ - compatible
+ - gpio-controller
+ - '#gpio-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ gpio@...00080 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x10000080 0x80>;
+
+ pinctrl: pinctrl {
+ compatible = "brcm,bcm6368-pinctrl";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupts-extended = <&ext_intc1 0 0>,
+ <&ext_intc1 1 0>,
+ <&ext_intc0 0 0>,
+ <&ext_intc0 1 0>,
+ <&ext_intc0 2 0>,
+ <&ext_intc0 3 0>;
+ interrupt-names = "gpio32",
+ "gpio33",
+ "gpio34",
+ "gpio35",
+ "gpio36",
+ "gpio37";
+
+ pinctrl_analog_afe_0: analog_afe_0 {
+ function = "analog_afe_0";
+ pins = "gpio0";
+ };
+
+ pinctrl_analog_afe_1: analog_afe_1 {
+ function = "analog_afe_1";
+ pins = "gpio1";
+ };
+
+ pinctrl_sys_irq: sys_irq {
+ function = "sys_irq";
+ pins = "gpio2";
+ };
+
+ pinctrl_serial_led: serial_led {
+ pinctrl_serial_led_data: serial_led_data {
+ function = "serial_led_data";
+ pins = "gpio3";
+ };
+
+ pinctrl_serial_led_clk: serial_led_clk {
+ function = "serial_led_clk";
+ pins = "gpio4";
+ };
+ };
+
+ pinctrl_inet_led: inet_led {
+ function = "inet_led";
+ pins = "gpio5";
+ };
+
+ pinctrl_ephy0_led: ephy0_led {
+ function = "ephy0_led";
+ pins = "gpio6";
+ };
+
+ pinctrl_ephy1_led: ephy1_led {
+ function = "ephy1_led";
+ pins = "gpio7";
+ };
+
+ pinctrl_ephy2_led: ephy2_led {
+ function = "ephy2_led";
+ pins = "gpio8";
+ };
+
+ pinctrl_ephy3_led: ephy3_led {
+ function = "ephy3_led";
+ pins = "gpio9";
+ };
+
+ pinctrl_robosw_led_data: robosw_led_data {
+ function = "robosw_led_data";
+ pins = "gpio10";
+ };
+
+ pinctrl_robosw_led_clk: robosw_led_clk {
+ function = "robosw_led_clk";
+ pins = "gpio11";
+ };
+
+ pinctrl_robosw_led0: robosw_led0 {
+ function = "robosw_led0";
+ pins = "gpio12";
+ };
+
+ pinctrl_robosw_led1: robosw_led1 {
+ function = "robosw_led1";
+ pins = "gpio13";
+ };
+
+ pinctrl_usb_device_led: usb_device_led {
+ function = "usb_device_led";
+ pins = "gpio14";
+ };
+
+ pinctrl_pci: pci {
+ pinctrl_pci_req1: pci_req1 {
+ function = "pci_req1";
+ pins = "gpio16";
+ };
+
+ pinctrl_pci_gnt1: pci_gnt1 {
+ function = "pci_gnt1";
+ pins = "gpio17";
+ };
+
+ pinctrl_pci_intb: pci_intb {
+ function = "pci_intb";
+ pins = "gpio18";
+ };
+
+ pinctrl_pci_req0: pci_req0 {
+ function = "pci_req0";
+ pins = "gpio19";
+ };
+
+ pinctrl_pci_gnt0: pci_gnt0 {
+ function = "pci_gnt0";
+ pins = "gpio20";
+ };
+ };
+
+ pinctrl_pcmcia: pcmcia {
+ pinctrl_pcmcia_cd1: pcmcia_cd1 {
+ function = "pcmcia_cd1";
+ pins = "gpio22";
+ };
+
+ pinctrl_pcmcia_cd2: pcmcia_cd2 {
+ function = "pcmcia_cd2";
+ pins = "gpio23";
+ };
+
+ pinctrl_pcmcia_vs1: pcmcia_vs1 {
+ function = "pcmcia_vs1";
+ pins = "gpio24";
+ };
+
+ pinctrl_pcmcia_vs2: pcmcia_vs2 {
+ function = "pcmcia_vs2";
+ pins = "gpio25";
+ };
+ };
+
+ pinctrl_ebi_cs2: ebi_cs2 {
+ function = "ebi_cs2";
+ pins = "gpio26";
+ };
+
+ pinctrl_ebi_cs3: ebi_cs3 {
+ function = "ebi_cs3";
+ pins = "gpio27";
+ };
+
+ pinctrl_spi_cs2: spi_cs2 {
+ function = "spi_cs2";
+ pins = "gpio28";
+ };
+
+ pinctrl_spi_cs3: spi_cs3 {
+ function = "spi_cs3";
+ pins = "gpio29";
+ };
+
+ pinctrl_spi_cs4: spi_cs4 {
+ function = "spi_cs4";
+ pins = "gpio30";
+ };
+
+ pinctrl_spi_cs5: spi_cs5 {
+ function = "spi_cs5";
+ pins = "gpio31";
+ };
+
+ pinctrl_uart1: uart1 {
+ function = "uart1";
+ group = "uart1_grp";
+ };
+ };
+ };
--
2.20.1
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