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Message-ID: <1614222586.25750.7.camel@mhfsdcap03>
Date: Thu, 25 Feb 2021 11:09:46 +0800
From: Jianjun Wang <jianjun.wang@...iatek.com>
To: Krzysztof Wilczyński <kw@...ux.com>
CC: Bjorn Helgaas <helgaas@...nel.org>,
Rob Herring <robh+dt@...nel.org>, <maz@...nel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Ryder Lee <ryder.lee@...iatek.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
"Matthias Brugger" <matthias.bgg@...il.com>,
<linux-pci@...r.kernel.org>, <linux-mediatek@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
"Sj Huang" <sj.huang@...iatek.com>, <youlin.pei@...iatek.com>,
<chuanjia.liu@...iatek.com>, <qizhong.cheng@...iatek.com>,
<sin_jieyang@...iatek.com>, <drinkcat@...omium.org>,
<Rex-BC.Chen@...iatek.com>, <anson.chuang@...iatek.com>
Subject: Re: [v8,5/7] PCI: mediatek-gen3: Add MSI support
Hi Krzysztof,
Thanks for your review, I will fix it at next version.
On Wed, 2021-02-24 at 15:31 +0100, Krzysztof Wilczyński wrote:
> Hi Jianjun,
>
> [...]
> > +static struct irq_chip mtk_msi_irq_chip = {
> > + .name = "MSI",
> > + .irq_enable = mtk_pcie_irq_unmask,
> > + .irq_disable = mtk_pcie_irq_mask,
> > + .irq_ack = irq_chip_ack_parent,
> > + .irq_mask = mtk_pcie_irq_mask,
> > + .irq_unmask = mtk_pcie_irq_unmask,
> > +};
>
> For consistency sake, what about aligning this like the
> struct mtk_msi_bottom_irq_chip has been? See immediately below.
>
> [...]
> > +static struct irq_chip mtk_msi_bottom_irq_chip = {
> > + .irq_ack = mtk_msi_bottom_irq_ack,
> > + .irq_mask = mtk_msi_bottom_irq_mask,
> > + .irq_unmask = mtk_msi_bottom_irq_unmask,
> > + .irq_compose_msi_msg = mtk_compose_msi_msg,
> > + .irq_set_affinity = mtk_pcie_set_affinity,
> > + .name = "MSI",
> > +};
>
> Krzysztof
Thanks.
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