lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAMuHMdXNBeVK0ze8HSA=t5TTfhyuRz=+yLHMBioUbsuBxUoWyA@mail.gmail.com>
Date:   Fri, 26 Feb 2021 09:45:20 +0100
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Fabrizio Castro <fabrizio.castro.jz@...esas.com>
Cc:     Rob Herring <robh+dt@...nel.org>, Arnd Bergmann <arnd@...db.de>,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        Linux API <linux-api@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Chris Paterson <Chris.Paterson2@...esas.com>,
        Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>,
        Phil Edworthy <phil.edworthy@...esas.com>,
        Dirk Behme <Dirk.Behme@...bosch.com>,
        Peter Erben <Peter.Erben@...bosch.com>
Subject: Re: [PATCH 2/7] clk: renesas: r8a77965: Add DAB clock

Hi Fabrizio,

On Thu, Feb 25, 2021 at 11:53 PM Fabrizio Castro
<fabrizio.castro.jz@...esas.com> wrote:
> This patch adds the DAB clock to the R8A77965 SoC.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>

Thanks for your patch!

> --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
> @@ -250,6 +250,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
>         DEF_MOD("ssi2",                 1013,   MOD_CLK_ID(1005)),
>         DEF_MOD("ssi1",                 1014,   MOD_CLK_ID(1005)),
>         DEF_MOD("ssi0",                 1015,   MOD_CLK_ID(1005)),
> +       DEF_MOD("dab",                  1016,   R8A77965_CLK_S0D6),

Unfortunately this bit is not documented in the R-Car Gen3 Hardware
User's Manual, so I have to trust you on this.

While it's not unusual that the same module on R-Car E3 and M3-N
has different parent clocks, it does strike me as odd that S0D6 on M3-N
runs at 133 MHz, while S3D1 on E3 runs at 266 MHz.
Probably it doesn't matter that much, as your driver doesn't care
about the actual clock rate.

>         DEF_MOD("scu-all",              1017,   R8A77965_CLK_S3D4),
>         DEF_MOD("scu-dvc1",             1018,   MOD_CLK_ID(1017)),
>         DEF_MOD("scu-dvc0",             1019,   MOD_CLK_ID(1017)),

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ