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Message-Id: <20210226140305.26356-10-nsaenzjulienne@suse.de>
Date: Fri, 26 Feb 2021 15:03:01 +0100
From: Nicolas Saenz Julienne <nsaenzjulienne@...e.de>
To: linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: f.fainelli@...il.com, robh+dt@...nel.org, robin.murphy@....com,
ardb@...nel.org, hch@...radead.org, narmstrong@...libre.com,
dwmw2@...radead.org, linux@...linux.org.uk,
catalin.marinas@....com, arnd@...db.de, will@...nel.org,
Nicolas Saenz Julienne <nsaenzjulienne@...e.de>
Subject: [RFC 09/13] iommu/arm-smmu: Make use of dev_64bit_mmio_supported()
Some arm SMMU implementations might sit on a bus that doesn't support
64bit memory accesses. In that case default to using hi_lo_{readq,
writeq}() and BUG if such platform tries to use AArch64 formats as they
rely on writeq()'s atomicity.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@...e.de>
---
drivers/iommu/arm/arm-smmu/arm-smmu.c | 9 +++++++++
drivers/iommu/arm/arm-smmu/arm-smmu.h | 9 +++++++--
2 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c
index d8c6bfde6a61..239ff42b20c3 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c
@@ -1889,6 +1889,15 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
smmu->features |= ARM_SMMU_FEAT_FMT_AARCH64_64K;
}
+ /*
+ * 64bit accesses not possible through the interconnect, AArch64
+ * formats depend on it.
+ */
+ BUG_ON(!dev_64bit_mmio_supported(smmu->dev) &&
+ smmu->features & (ARM_SMMU_FEAT_FMT_AARCH64_4K |
+ ARM_SMMU_FEAT_FMT_AARCH64_16K |
+ ARM_SMMU_FEAT_FMT_AARCH64_64K));
+
if (smmu->impl && smmu->impl->cfg_probe) {
ret = smmu->impl->cfg_probe(smmu);
if (ret)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.h b/drivers/iommu/arm/arm-smmu/arm-smmu.h
index d2a2d1bc58ba..997d13a21717 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu.h
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu.h
@@ -477,15 +477,20 @@ static inline void arm_smmu_writel(struct arm_smmu_device *smmu, int page,
{
if (smmu->impl && unlikely(smmu->impl->write_reg))
smmu->impl->write_reg(smmu, page, offset, val);
- else
+ else if (dev_64bit_mmio_supported(smmu->dev))
writel_relaxed(val, arm_smmu_page(smmu, page) + offset);
+ else
+ hi_lo_writeq_relaxed(val, arm_smmu_page(smmu, page) + offset);
}
static inline u64 arm_smmu_readq(struct arm_smmu_device *smmu, int page, int offset)
{
if (smmu->impl && unlikely(smmu->impl->read_reg64))
return smmu->impl->read_reg64(smmu, page, offset);
- return readq_relaxed(arm_smmu_page(smmu, page) + offset);
+ else if (dev_64bit_mmio_supported(smmu->dev))
+ return readq_relaxed(arm_smmu_page(smmu, page) + offset);
+ else
+ return hi_lo_readq_relaxed(arm_smmu_page(smmu, page) + offset);
}
static inline void arm_smmu_writeq(struct arm_smmu_device *smmu, int page,
--
2.30.1
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