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Message-ID: <def4e2dd-5e9c-5878-a116-754f9bfe735e@gmail.com>
Date:   Sat, 27 Feb 2021 08:04:52 +0900
From:   Chanwoo Choi <cwchoi00@...il.com>
To:     Abel Vesa <abel.vesa@....com>, Rob Herring <robh@...nel.org>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <kernel@...gutronix.de>,
        Lucas Stach <l.stach@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        Chanwoo Choi <cw00.choi@...sung.com>,
        Georgi Djakov <djakov@...nel.org>,
        Dong Aisheng <aisheng.dong@....com>,
        Peng Fan <peng.fan@....com>,
        Martin Kepplinger <martink@...teo.de>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-clk@...r.kernel.org,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Cc:     NXP Linux Team <linux-imx@....com>
Subject: Re: [RFC 00/19] Rework support for i.MX8MQ interconnect with devfreq

Hi,

You missed sending the patches to linux-pm mailing list.
On next version, please send it linux-pm.

Thanks,
Chanwoo Choi

On 21. 2. 20. 오전 12:59, Abel Vesa wrote:
> This has been on my queue for quite some time now. It is more of a
> proof-of-concept.
> 
> This rework is done with the compatibility of future i.MX platforms in
> mind. For example, the i.MX8MP platform has multiple NoCs. This
> patchsets prepares the imx interconnect and imx devfreq for that too.
> 
> As of now, none of the drivers involved are being used and there is no
> icc consumer on any off the i.MX platforms.
> 
> Basically, the steps taken here are the following:
> 
> 1. Make the dram_apb clock "reparantable" from kernel.
> This is needed in order to keep track of the actual parent of the
> dram_apb clock in the kernel clock hierarchy. Note that the actual
> switch is done EL3 (TF-A).
> 
> 2. Rework the imx-bus so the actual link between the icc and the
> NoCs or the pl301s is not tightly coupled. This allows us to have
> as many NoCs as necessary but also allows as to use the same driver
> for the pl301s. The pl301s have their own clocks too, so we need to
> reduce their rates too.
> 
> 3. Rework the imx8m-ddrc driver. Remove the support for dts defined
> OPPs. The EL3 provides those. So instead of havingi to keep the OPP table in
> both EL3 and kernel in sync, we rely on what the EL3 gives us.
> Also, when the platform suspends, the bus needs to be running at highest
> rate, otherwise there is a chance it might not resume anymore.
> By adding the late system sleep PM ops we can handle that easily.
> 
> 4. Rework the imx interconnect driver to use the fsl,icc-id instead
> of the robust imx_icc_node_adj_desc for linking with the target node.
> By adding the fsl,icc-id property to all the NoC and pl301 dts nodes,
> we can link each icc node to their corresponding NoC, pl301 or dram.
> Basically, when the imx interconnect platform specific driver probes,
> it will take each node defined for that platform and look-up the
> corresponding dts node based on the id and add that as the qos device.
> 
> 5. Added the fec and usdhc as icc consumers. This is just as an example.
> All the other consumers can be added later. Basically, each consumer
> will add a path to their device node and in the driver will have to
> handle that icc path accordingly.
> 
> Abel Vesa (19):
>    clk: imx8mq: Replace critical with ignore_unused flag for dram_apb
>      clock
>    dt-bindings: interconnect: imx8mq: Add missing pl301 and SAI ids
>    devfreq: imx-bus: Switch governor to powersave
>    devfreq: imx-bus: Decouple imx-bus from icc made
>    devfreq: imx8m-ddrc: Change governor to powersave
>    devfreq: imx8m-ddrc: Use the opps acquired from EL3
>    devfreq: imx8m-ddrc: Add late system sleep PM ops
>    interconnect: imx: Switch from imx_icc_node_adj_desc to fsl,icc-id
>      node assignment
>    interconnect: imx8: Remove the imx_icc_node_adj_desc
>    interconnect: imx8mq: Add the pl301_per_m and pl301_wakeup nodes and
>      subnodes
>    interconnect: imx8mq: Add of_match_table
>    interconnect: imx: Add imx_icc_get_bw and imx_icc_aggregate functions
>    arm64: dts: imx8mq: Add fsl,icc-id property to ddrc node
>    arm64: dts: imx8mq: Add fsl,icc-id to noc node
>    arm64: dts: imx8mq: Add all pl301 nodes
>    arm64: dts: imx8mq: Add the interconnect node
>    arm64: dts: imx8mq: Add interconnect properties to icc consumer nodes
>    net: ethernet: fec_main: Add interconnect support
>    mmc: sdhci-esdhc-imx: Add interconnect support
> 
>   arch/arm64/boot/dts/freescale/imx8mq.dtsi | 200 +++++++++++++++++++++-
>   drivers/clk/imx/clk-imx8mq.c              |   2 +-
>   drivers/devfreq/imx-bus.c                 |  42 +----
>   drivers/devfreq/imx8m-ddrc.c              |  75 +++-----
>   drivers/interconnect/imx/imx.c            |  92 +++++-----
>   drivers/interconnect/imx/imx.h            |  19 +-
>   drivers/interconnect/imx/imx8mm.c         |  32 ++--
>   drivers/interconnect/imx/imx8mn.c         |  28 +--
>   drivers/interconnect/imx/imx8mq.c         |  59 ++++---
>   drivers/mmc/host/sdhci-esdhc-imx.c        |  26 +++
>   drivers/net/ethernet/freescale/fec.h      |   3 +
>   drivers/net/ethernet/freescale/fec_main.c |  19 ++
>   include/dt-bindings/interconnect/imx8mq.h |   9 +
>   scripts/dtc/fdtoverlay                    | Bin 0 -> 61280 bytes
>   14 files changed, 393 insertions(+), 213 deletions(-)
>   create mode 100755 scripts/dtc/fdtoverlay
> 

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