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Message-ID: <CAHmME9ohOsdAwGaqCQZKDynNoC2k=14g9VSFP2mTUA7txf_Ssw@mail.gmail.com>
Date:   Sat, 27 Feb 2021 23:59:40 +0100
From:   "Jason A. Donenfeld" <Jason@...c4.com>
To:     "Maciej W. Rozycki" <macro@...am.me.uk>
Cc:     LKML <linux-kernel@...r.kernel.org>,
        "open list:BROADCOM NVRAM DRIVER" <linux-mips@...r.kernel.org>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Ralf Baechle <ralf@...ux-mips.org>,
        George Cherian <gcherian@...vell.com>,
        Huacai Chen <chenhuacai@...nel.org>,
        Jiaxun Yang <jiaxun.yang@...goat.com>
Subject: Re: [PATCH] MIPS: select CPU_MIPS64 for remaining MIPS64 CPUs

On Sat, Feb 27, 2021 at 2:41 PM Maciej W. Rozycki <macro@...am.me.uk> wrote:
>
> On Sat, 27 Feb 2021, Jason A. Donenfeld wrote:
>
> > The CPU_MIPS64 and CPU_MIPS32 variables are supposed to be able to
> > distinguish broadly between 64-bit and 32-bit MIPS CPUs. However, they
>
>  That is not true.  The purpose of these options is to identify MIPS64 and
> MIPS32 ISA processors respectively (and the generic features these ISAs
> imply).  There are 64-bit and 32-bit MIPS processors which do not qualify,
> specifically all MIPS I, MIPS II, MIPS III, and MIPS IV implementations.
>
> > weren't selected by the specialty CPUs, Octeon and Loongson, which meant
> > it was possible to hit a weird state of:
> >
> >     MIPS=y, CONFIG_64BIT=y, CPU_MIPS64=n
>
>  This is a correct combination for MIPS III and MIPS IV processors.
>
> > This commit rectifies the issue by having CPU_MIPS64 be selected when
> > the missing Octeon or Loongson models are selected.
>
>  From the description and/or other options selected by CPU_LOONGSON64 and
> CPU_CAVIUM_OCTEON I infer the change itself is correct, so you only need
> to rewrite the change description.

Indeed you're right. v2 on its way.

Jason

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