lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Sun, 28 Feb 2021 14:23:22 +0000
From:   Avri Altman <Avri.Altman@....com>
To:     Can Guo <cang@...eaurora.org>,
        "asutoshd@...eaurora.org" <asutoshd@...eaurora.org>,
        "nguyenb@...eaurora.org" <nguyenb@...eaurora.org>,
        "hongwus@...eaurora.org" <hongwus@...eaurora.org>,
        "linux-scsi@...r.kernel.org" <linux-scsi@...r.kernel.org>,
        "kernel-team@...roid.com" <kernel-team@...roid.com>
CC:     Nitin Rawat <nitirawa@...eaurora.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Alim Akhtar <alim.akhtar@...sung.com>,
        "James E.J. Bottomley" <jejb@...ux.ibm.com>,
        "Martin K. Petersen" <martin.petersen@...cle.com>,
        "open list:ARM/QUALCOMM SUPPORT" <linux-arm-msm@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v2 2/3] scsi: ufs-qcom: Disable interrupt in reset path

> 
> From: Nitin Rawat <nitirawa@...eaurora.org>
> 
> Disable interrupt in reset path to flush pending IRQ handler in order to
> avoid possible NoC issues.
> 
> Signed-off-by: Nitin Rawat <nitirawa@...eaurora.org>
> Signed-off-by: Can Guo <cang@...eaurora.org>
> ---
>  drivers/scsi/ufs/ufs-qcom.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c
> index f97d7b0..a9dc8d7 100644
> --- a/drivers/scsi/ufs/ufs-qcom.c
> +++ b/drivers/scsi/ufs/ufs-qcom.c
> @@ -253,12 +253,17 @@ static int ufs_qcom_host_reset(struct ufs_hba *hba)
>  {
>         int ret = 0;
>         struct ufs_qcom_host *host = ufshcd_get_variant(hba);
> +       bool reenable_intr = false;
> 
>         if (!host->core_reset) {
>                 dev_warn(hba->dev, "%s: reset control not set\n", __func__);
>                 goto out;
>         }
> 
> +       reenable_intr = hba->is_irq_enabled;
> +       disable_irq(hba->irq);
> +       hba->is_irq_enabled = false;
> +
>         ret = reset_control_assert(host->core_reset);
>         if (ret) {
>                 dev_err(hba->dev, "%s: core_reset assert failed, err = %d\n",
> @@ -280,6 +285,11 @@ static int ufs_qcom_host_reset(struct ufs_hba *hba)
> 
>         usleep_range(1000, 1100);
> 
> +       if (reenable_intr) {
> +               enable_irq(hba->irq);
> +               hba->is_irq_enabled = true;
> +       }
> +
If in the future, you will enable UFSHCI_QUIRK_BROKEN_HCE on your platform (currently only for Exynos),
Will this code still work?

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ