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Message-ID: <202103010421.TOVnVcrZ-lkp@intel.com>
Date:   Mon, 1 Mar 2021 04:42:42 +0800
From:   kernel test robot <lkp@...el.com>
To:     Jiaxun Yang <jiaxun.yang@...goat.com>
Cc:     kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Subject: arch/mips/pci/ops-loongson2.c:93:44: sparse: sparse: incorrect type
 in argument 2 (different address spaces)

Hi Jiaxun,

First bad commit (maybe != root cause):

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   5695e51619745d4fe3ec2506a2f0cd982c5e27a4
commit: b13812ddea615b6507beef24f76540c0c1143c5c MIPS: Loongson2ef: Disable Loongson MMI instructions
date:   5 months ago
config: mips-randconfig-s031-20210301 (attached as .config)
compiler: mips64el-linux-gcc (GCC) 9.3.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # apt-get install sparse
        # sparse version: v0.6.3-241-geaceeafa-dirty
        # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=b13812ddea615b6507beef24f76540c0c1143c5c
        git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
        git fetch --no-tags linus master
        git checkout b13812ddea615b6507beef24f76540c0c1143c5c
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=mips 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>


"sparse warnings: (new ones prefixed by >>)"
   command-line: note: in included file:
   builtin:1:9: sparse: sparse: preprocessor token __ATOMIC_ACQUIRE redefined
   builtin:0:0: sparse: this was the original definition
   builtin:1:9: sparse: sparse: preprocessor token __ATOMIC_SEQ_CST redefined
   builtin:0:0: sparse: this was the original definition
   builtin:1:9: sparse: sparse: preprocessor token __ATOMIC_ACQ_REL redefined
   builtin:0:0: sparse: this was the original definition
   builtin:1:9: sparse: sparse: preprocessor token __ATOMIC_RELEASE redefined
   builtin:0:0: sparse: this was the original definition
   arch/mips/pci/ops-loongson2.c:93:24: sparse: sparse: incorrect type in argument 1 (different base types) @@     expected unsigned int [usertype] val @@     got restricted __le32 [usertype] @@
   arch/mips/pci/ops-loongson2.c:93:24: sparse:     expected unsigned int [usertype] val
   arch/mips/pci/ops-loongson2.c:93:24: sparse:     got restricted __le32 [usertype]
>> arch/mips/pci/ops-loongson2.c:93:44: sparse: sparse: incorrect type in argument 2 (different address spaces) @@     expected void volatile [noderef] __iomem *mem @@     got void *[assigned] addrp @@
   arch/mips/pci/ops-loongson2.c:93:44: sparse:     expected void volatile [noderef] __iomem *mem
   arch/mips/pci/ops-loongson2.c:93:44: sparse:     got void *[assigned] addrp
>> arch/mips/pci/ops-loongson2.c:95:25: sparse: sparse: incorrect type in argument 1 (different address spaces) @@     expected void const volatile [noderef] __iomem *mem @@     got void *[assigned] addrp @@
   arch/mips/pci/ops-loongson2.c:95:25: sparse:     expected void const volatile [noderef] __iomem *mem
   arch/mips/pci/ops-loongson2.c:95:25: sparse:     got void *[assigned] addrp
   arch/mips/pci/ops-loongson2.c:95:25: sparse: sparse: cast to restricted __le32
--
   command-line: note: in included file:
   builtin:1:9: sparse: sparse: preprocessor token __ATOMIC_ACQUIRE redefined
   builtin:0:0: sparse: this was the original definition
   builtin:1:9: sparse: sparse: preprocessor token __ATOMIC_SEQ_CST redefined
   builtin:0:0: sparse: this was the original definition
   builtin:1:9: sparse: sparse: preprocessor token __ATOMIC_ACQ_REL redefined
   builtin:0:0: sparse: this was the original definition
   builtin:1:9: sparse: sparse: preprocessor token __ATOMIC_RELEASE redefined
   builtin:0:0: sparse: this was the original definition
>> arch/mips/loongson2ef/common/reset.c:24:17: sparse: sparse: cast removes address space '__iomem' of expression
--
   command-line: note: in included file:
   builtin:1:9: sparse: sparse: preprocessor token __ATOMIC_ACQUIRE redefined
   builtin:0:0: sparse: this was the original definition
   builtin:1:9: sparse: sparse: preprocessor token __ATOMIC_SEQ_CST redefined
   builtin:0:0: sparse: this was the original definition
   builtin:1:9: sparse: sparse: preprocessor token __ATOMIC_ACQ_REL redefined
   builtin:0:0: sparse: this was the original definition
   builtin:1:9: sparse: sparse: preprocessor token __ATOMIC_RELEASE redefined
   builtin:0:0: sparse: this was the original definition
>> arch/mips/loongson2ef/common/cs5536/cs5536_isa.c:84:6: sparse: sparse: symbol 'pci_isa_write_bar' was not declared. Should it be static?
>> arch/mips/loongson2ef/common/cs5536/cs5536_isa.c:110:5: sparse: sparse: symbol 'pci_isa_read_bar' was not declared. Should it be static?

vim +93 arch/mips/pci/ops-loongson2.c

e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   30  
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   31  
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   32  static int loongson_pcibios_config_access(unsigned char access_type,
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   33  				      struct pci_bus *bus,
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   34  				      unsigned int devfn, int where,
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   35  				      u32 *data)
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   36  {
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   37  	u32 busnum = bus->number;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   38  	u32 addr, type;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   39  	u32 dummy;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   40  	void *addrp;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   41  	int device = PCI_SLOT(devfn);
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   42  	int function = PCI_FUNC(devfn);
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   43  	int reg = where & ~3;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   44  
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   45  	if (busnum == 0) {
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   46  		/* board-specific part,currently,only fuloong2f,yeeloong2f
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   47  		 * use CS5536, fuloong2e use via686b, gdium has no
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   48  		 * south bridge
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   49  		 */
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   50  #ifdef CONFIG_CS5536
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   51  		/* cs5536_pci_conf_read4/write4() will call _rdmsr/_wrmsr() to
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   52  		 * access the regsters PCI_MSR_ADDR, PCI_MSR_DATA_LO,
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   53  		 * PCI_MSR_DATA_HI, which is bigger than PCI_MSR_CTRL, so, it
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   54  		 * will not go this branch, but the others. so, no calling dead
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   55  		 * loop here.
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   56  		 */
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   57  		if ((PCI_IDSEL_CS5536 == device) && (reg < PCI_MSR_CTRL)) {
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   58  			switch (access_type) {
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   59  			case PCI_ACCESS_READ:
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   60  				*data = cs5536_pci_conf_read4(function, reg);
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   61  				break;
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   62  			case PCI_ACCESS_WRITE:
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   63  				cs5536_pci_conf_write4(function, reg, *data);
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   64  				break;
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   65  			}
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   66  			return 0;
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   67  		}
1032bce3ef81cb arch/mips/pci/ops-loongson2.c Wu Zhangjin 2009-11-10   68  #endif
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   69  		/* Type 0 configuration for onboard PCI bus */
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   70  		if (device > MAX_DEV_NUM)
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   71  			return -1;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   72  
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   73  		addr = (1 << (device + ID_SEL_BEGIN)) | (function << 8) | reg;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   74  		type = 0;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   75  	} else {
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   76  		/* Type 1 configuration for offboard PCI bus */
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   77  		addr = (busnum << 16) | (device << 11) | (function << 8) | reg;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   78  		type = 0x10000;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   79  	}
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   80  
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   81  	/* Clear aborts */
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   82  	LOONGSON_PCICMD |= LOONGSON_PCICMD_MABORT_CLR | \
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   83  				LOONGSON_PCICMD_MTABORT_CLR;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   84  
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   85  	LOONGSON_PCIMAP_CFG = (addr >> 16) | type;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   86  
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   87  	/* Flush Bonito register block */
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   88  	dummy = LOONGSON_PCIMAP_CFG;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   89  	mmiowb();
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   90  
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   91  	addrp = CFG_SPACE_REG(addr & 0xffff);
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   92  	if (access_type == PCI_ACCESS_WRITE)
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16  @93  		writel(cpu_to_le32(*data), addrp);
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   94  	else
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16  @95  		*data = le32_to_cpu(readl(addrp));
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   96  
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   97  	/* Detect Master/Target abort */
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   98  	if (LOONGSON_PCICMD & (LOONGSON_PCICMD_MABORT_CLR |
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16   99  			     LOONGSON_PCICMD_MTABORT_CLR)) {
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16  100  		/* Error occurred */
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16  101  
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16  102  		/* Clear bits */
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16  103  		LOONGSON_PCICMD |= (LOONGSON_PCICMD_MABORT_CLR |
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16  104  				  LOONGSON_PCICMD_MTABORT_CLR);
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16  105  
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16  106  		return -1;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16  107  	}
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16  108  
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16  109  	return 0;
e2fee5723bbda4 arch/mips/pci/ops-fuloong2e.c Wu Zhangjin 2009-10-16  110  

:::::: The code at line 93 was first introduced by commit
:::::: e2fee5723bbda4a05c86f16a9d0f889a2c4ecede MIPS: Bonito64: Make Loongson independent from Bonito64 code.

:::::: TO: Wu Zhangjin <wuzhangjin@...il.com>
:::::: CC: Ralf Baechle <ralf@...ux-mips.org>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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