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Message-ID: <OSAPR01MB42277439964B9E14D3AC94F18F9A9@OSAPR01MB4227.jpnprd01.prod.outlook.com>
Date: Mon, 1 Mar 2021 00:39:01 +0000
From: "ito-yuichi@...itsu.com" <ito-yuichi@...itsu.com>
To: 'Marc Zyngier' <maz@...nel.org>
CC: 'Mark Rutland' <mark.rutland@....com>,
'LAK' <linux-arm-kernel@...ts.infradead.org>,
'linux-kernel' <linux-kernel@...r.kernel.org>,
'Android Kernel Team' <kernel-team@...roid.com>,
'Russell King' <linux@....linux.org.uk>,
'Peter Zijlstra' <peterz@...radead.org>,
'Catalin Marinas' <catalin.marinas@....com>,
'Thomas Gleixner' <tglx@...utronix.de>,
'Will Deacon' <will@...nel.org>,
'Valentin Schneider' <Valentin.Schneider@....com>
Subject: RE: [PATCH v2 0/6] arm/arm64: Allow the rescheduling IPI to bypass
irq_enter/exit
Hi Marc,
I plan to add NMI patches which enables IPI_CPU_CRASH_STOP IPI as pseudo-NMI[1].
But I know need to resolve the instrumentation issues before that. I think need to moving arm64 entry code over to the generic entry code(kernel/entry/common.c) for that, is this right?
Can you tell me current status?
Let me know if there's anything I can do to help.
[1]https://lore.kernel.org/lkml/20201104080539.3205889-1-ito-yuichi@fujitsu.com/
Thanks,
Yuichi Ito
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