linux-kernel - [PATCH] arm64: dts: allwinner: h6: Switch to macros for RSB clock/reset indices

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-Id: <20210301162309.1225-1-wens@kernel.org>
Date:   Tue,  2 Mar 2021 00:23:09 +0800
From:   Chen-Yu Tsai <wens@...nel.org>
To:     Maxime Ripard <mripard@...nel.org>,
        Jernej Skrabec <jernej.skrabec@...l.net>
Cc:     Chen-Yu Tsai <wens@...e.org>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH] arm64: dts: allwinner: h6: Switch to macros for RSB clock/reset indices

From: Chen-Yu Tsai <wens@...e.org>

The macros for the clock and reset indices for the RSB hardware block
were replaced with raw numbers when the RSB controller node was added.
This was done to avoid cross-tree dependencies.

Now that both the clk and DT changes have been merged, we can switch
back to using the macros.

Fixes: aaad900757a6 ("arm64: dts: allwinner: h6: Add RSB controller node")
Signed-off-by: Chen-Yu Tsai <wens@...e.org>
---

Small patch split out from the H6 RSB clock support patch.
This should be merged for v5.12.

---
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 49e979794094..af8b7d0ef750 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -995,9 +995,9 @@ r_rsb: rsb@...3000 {
 			compatible = "allwinner,sun8i-a23-rsb";
 			reg = <0x07083000 0x400>;
 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&r_ccu 13>;
+			clocks = <&r_ccu CLK_R_APB2_RSB>;
 			clock-frequency = <3000000>;
-			resets = <&r_ccu 7>;
+			resets = <&r_ccu RST_R_APB2_RSB>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&r_rsb_pins>;
 			status = "disabled";
-- 
2.30.1