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Message-Id: <20210301161158.875032711@linuxfoundation.org>
Date:   Mon,  1 Mar 2021 17:09:52 +0100
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org, John Garry <john.garry@...wei.com>,
        Will Deacon <will@...nel.org>,
        James Clark <james.clark@....com>,
        Jiri Olsa <jolsa@...hat.com>, Leo Yan <leo.yan@...aro.org>,
        Mark Rutland <mark.rutland@....com>,
        Mathieu Poirier <mathieu.poirier@...aro.org>,
        <nakamura.shun@...itsu.com>, linux-arm-kernel@...ts.infradead.org,
        linuxarm@...neuler.org, Arnaldo Carvalho de Melo <acme@...hat.com>,
        Sasha Levin <sashal@...nel.org>
Subject: [PATCH 5.10 344/663] perf vendor events arm64: Fix Ampere eMag event typo

From: John Garry <john.garry@...wei.com>

[ Upstream commit 2bf797be81fa808f05f1a7a65916619132256a27 ]

The "briefdescription" for event 0x35 has a typo - fix it.

Fixes: d35c595bf005 ("perf vendor events arm64: Revise core JSON events for eMAG")
Signed-off-by: John Garry <john.garry@...wei.com>
Acked-by: Will Deacon <will@...nel.org>
Cc: James Clark <james.clark@....com>
Cc: Jiri Olsa <jolsa@...hat.com>
Cc: Leo Yan <leo.yan@...aro.org>
Cc: Mark Rutland <mark.rutland@....com>
Cc: Mathieu Poirier <mathieu.poirier@...aro.org>
Cc: Nakamura, Shunsuke/中村 俊介 <nakamura.shun@...itsu.com>
Cc: linux-arm-kernel@...ts.infradead.org
Cc: linuxarm@...neuler.org
Link: https://lore.kernel.org/r/1611835236-34696-2-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@...hat.com>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
 tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json
index 40010a8724b3a..ce6e7e7960579 100644
--- a/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json
+++ b/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json
@@ -114,7 +114,7 @@
         "PublicDescription": "Level 2 access to instruciton TLB that caused a page table walk. This event counts on any instruciton access which causes L2I_TLB_REFILL to count",
         "EventCode": "0x35",
         "EventName": "L2I_TLB_ACCESS",
-        "BriefDescription": "L2D TLB access"
+        "BriefDescription": "L2I TLB access"
     },
     {
         "PublicDescription": "Branch target buffer misprediction",
-- 
2.27.0



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