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Message-ID: <CAAhSdy2cOoNK5f75e_mo5c-0-qo4zNWH+Lxoyg31br-+ZZ4n9w@mail.gmail.com>
Date: Tue, 2 Mar 2021 12:12:26 +0530
From: Anup Patel <anup@...infault.org>
To: Alexandre Ghiti <alex@...ti.fr>
Cc: Anup Patel <anup.patel@....com>,
Palmer Dabbelt <palmer@...belt.com>,
Palmer Dabbelt <palmerdabbelt@...gle.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Ulf Hansson <ulf.hansson@...aro.org>,
"Rafael J . Wysocki" <rjw@...ysocki.net>,
Pavel Machek <pavel@....cz>, Rob Herring <robh+dt@...nel.org>,
devicetree@...r.kernel.org, linux-pm@...r.kernel.org,
"linux-kernel@...r.kernel.org List" <linux-kernel@...r.kernel.org>,
Atish Patra <atish.patra@....com>,
Alistair Francis <Alistair.Francis@....com>,
Liush <liush@...winnertech.com>,
linux-riscv <linux-riscv@...ts.infradead.org>,
Sandeep Tripathy <milun.tripathy@...il.com>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [RFC PATCH 1/8] RISC-V: Enable CPU_IDLE drivers
On Fri, Feb 26, 2021 at 6:46 PM Alex Ghiti <alex@...ti.fr> wrote:
>
> Hi Anup,
>
> Le 2/21/21 à 4:37 AM, Anup Patel a écrit :
> > We force select CPU_PM and provide asm/cpuidle.h so that we can
> > use CPU IDLE drivers for Linux RISC-V kernel.
> >
> > Signed-off-by: Anup Patel <anup.patel@....com>
> > ---
> > arch/riscv/Kconfig | 7 +++++++
> > arch/riscv/configs/defconfig | 7 +++----
> > arch/riscv/configs/rv32_defconfig | 4 ++--
> > arch/riscv/include/asm/cpuidle.h | 24 ++++++++++++++++++++++++
> > arch/riscv/kernel/process.c | 3 ++-
> > 5 files changed, 38 insertions(+), 7 deletions(-)
> > create mode 100644 arch/riscv/include/asm/cpuidle.h
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index fe6862b06ead..4901200b6b6c 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -37,6 +37,7 @@ config RISCV
> > select CLONE_BACKWARDS
> > select CLINT_TIMER if !MMU
> > select COMMON_CLK
> > + select CPU_PM if CPU_IDLE
> > select EDAC_SUPPORT
> > select GENERIC_ARCH_TOPOLOGY if SMP
> > select GENERIC_ATOMIC64 if !64BIT
> > @@ -430,4 +431,10 @@ source "kernel/power/Kconfig"
> >
> > endmenu
> >
> > +menu "CPU Power Management"
> > +
> > +source "drivers/cpuidle/Kconfig"
> > +
> > +endmenu
> > +
> > source "drivers/firmware/Kconfig"
> > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> > index 6c0625aa96c7..dc4927c0e44b 100644
> > --- a/arch/riscv/configs/defconfig
> > +++ b/arch/riscv/configs/defconfig
> > @@ -13,11 +13,13 @@ CONFIG_USER_NS=y
> > CONFIG_CHECKPOINT_RESTORE=y
> > CONFIG_BLK_DEV_INITRD=y
> > CONFIG_EXPERT=y
> > +# CONFIG_SYSFS_SYSCALL is not set
> > CONFIG_BPF_SYSCALL=y
> > CONFIG_SOC_SIFIVE=y
> > CONFIG_SOC_VIRT=y
> > CONFIG_SMP=y
> > CONFIG_HOTPLUG_CPU=y
> > +CONFIG_CPU_IDLE=y
> > CONFIG_JUMP_LABEL=y
> > CONFIG_MODULES=y
> > CONFIG_MODULE_UNLOAD=y
> > @@ -65,10 +67,9 @@ CONFIG_HW_RANDOM=y
> > CONFIG_HW_RANDOM_VIRTIO=y
> > CONFIG_SPI=y
> > CONFIG_SPI_SIFIVE=y
> > +# CONFIG_PTP_1588_CLOCK is not set
> > CONFIG_GPIOLIB=y
> > CONFIG_GPIO_SIFIVE=y
> > -# CONFIG_PTP_1588_CLOCK is not set
> > -CONFIG_POWER_RESET=y
>
> Why do you remove this config ?
This option is selected by CONFIG_SOC_VIRT so it is being
removed from defconfig by savedefconfig.
>
> > CONFIG_DRM=y
> > CONFIG_DRM_RADEON=y
> > CONFIG_DRM_VIRTIO_GPU=y
> > @@ -132,5 +133,3 @@ CONFIG_DEBUG_BLOCK_EXT_DEVT=y
> > # CONFIG_FTRACE is not set
> > # CONFIG_RUNTIME_TESTING_MENU is not set
> > CONFIG_MEMTEST=y
> > -# CONFIG_SYSFS_SYSCALL is not set
> > -CONFIG_EFI=y
>
> And this is one too ? If those removals are intentional, maybe you can
> add something about that in the commit description ?
This is enabled by default so savedefconfig removes it.
>
> > diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> > index 8dd02b842fef..332e43a4a2c3 100644
> > --- a/arch/riscv/configs/rv32_defconfig
> > +++ b/arch/riscv/configs/rv32_defconfig
> > @@ -13,12 +13,14 @@ CONFIG_USER_NS=y
> > CONFIG_CHECKPOINT_RESTORE=y
> > CONFIG_BLK_DEV_INITRD=y
> > CONFIG_EXPERT=y
> > +# CONFIG_SYSFS_SYSCALL is not set
> > CONFIG_BPF_SYSCALL=y
> > CONFIG_SOC_SIFIVE=y
> > CONFIG_SOC_VIRT=y
> > CONFIG_ARCH_RV32I=y
> > CONFIG_SMP=y
> > CONFIG_HOTPLUG_CPU=y
> > +CONFIG_CPU_IDLE=y
> > CONFIG_JUMP_LABEL=y
> > CONFIG_MODULES=y
> > CONFIG_MODULE_UNLOAD=y
> > @@ -67,7 +69,6 @@ CONFIG_HW_RANDOM_VIRTIO=y
> > CONFIG_SPI=y
> > CONFIG_SPI_SIFIVE=y
> > # CONFIG_PTP_1588_CLOCK is not set
> > -CONFIG_POWER_RESET=y
> > CONFIG_DRM=y
> > CONFIG_DRM_RADEON=y
> > CONFIG_DRM_VIRTIO_GPU=y
> > @@ -131,4 +132,3 @@ CONFIG_DEBUG_BLOCK_EXT_DEVT=y
> > # CONFIG_FTRACE is not set
> > # CONFIG_RUNTIME_TESTING_MENU is not set
> > CONFIG_MEMTEST=y
> > -# CONFIG_SYSFS_SYSCALL is not set
> > diff --git a/arch/riscv/include/asm/cpuidle.h b/arch/riscv/include/asm/cpuidle.h
> > new file mode 100644
> > index 000000000000..1042d790e446
> > --- /dev/null
> > +++ b/arch/riscv/include/asm/cpuidle.h
> > @@ -0,0 +1,24 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Copyright (C) 2021 Allwinner Ltd
> > + * Copyright (C) 2021 Western Digital Corporation or its affiliates.
> > + */
> > +
> > +#ifndef _ASM_RISCV_CPUIDLE_H
> > +#define _ASM_RISCV_CPUIDLE_H
> > +
> > +#include <asm/barrier.h>
> > +#include <asm/processor.h>
> > +
> > +static inline void cpu_do_idle(void)
> > +{
> > + /*
> > + * Add mb() here to ensure that all
> > + * IO/MEM access are completed prior
>
> accessES ?
>
> > + * to enter WFI.
> > + */
> > + mb();
> > + wait_for_interrupt();
> > +}
> > +
> > +#endif
> > diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
> > index dd5f985b1f40..b5b51fd26624 100644
> > --- a/arch/riscv/kernel/process.c
> > +++ b/arch/riscv/kernel/process.c
> > @@ -21,6 +21,7 @@
> > #include <asm/string.h>
> > #include <asm/switch_to.h>
> > #include <asm/thread_info.h>
> > +#include <asm/cpuidle.h>
> >
> > register unsigned long gp_in_global __asm__("gp");
> >
> > @@ -35,7 +36,7 @@ extern asmlinkage void ret_from_kernel_thread(void);
> >
> > void arch_cpu_idle(void)
> > {
> > - wait_for_interrupt();
> > + cpu_do_idle();
> > raw_local_irq_enable();
> > }
> >
> >
Regards,
Anup
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