[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAOnJCU+71QoE7uVH+j557z8GEXMG4nLXr1u=x-QrmeaPbTTbKg@mail.gmail.com>
Date: Mon, 1 Mar 2021 23:27:17 -0800
From: Atish Patra <atishp@...shpatra.org>
To: Anup Patel <anup.patel@....com>
Cc: Palmer Dabbelt <palmer@...belt.com>,
Palmer Dabbelt <palmerdabbelt@...gle.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
Anup Patel <anup@...infault.org>,
"linux-kernel@...r.kernel.org List" <linux-kernel@...r.kernel.org>,
Atish Patra <atish.patra@....com>,
Alistair Francis <Alistair.Francis@....com>,
linux-riscv <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH v4] RISC-V: Use SBI SRST extension when available
On Mon, Mar 1, 2021 at 3:59 AM Anup Patel <anup.patel@....com> wrote:
>
> The SBI SRST extension provides a standard way to poweroff and
> reboot the system irrespective to whether Linux RISC-V S-mode
> is running natively (HS-mode) or inside Guest/VM (VS-mode).
>
> The SBI SRST extension is available in latest SBI v0.3-draft
> specification at: https://github.com/riscv/riscv-sbi-doc.
>
> This patch extends Linux RISC-V SBI implementation to detect
> and use SBI SRST extension.
>
> Signed-off-by: Anup Patel <anup.patel@....com>
> ---
> arch/riscv/include/asm/sbi.h | 16 ++++++++++++++
> arch/riscv/kernel/sbi.c | 41 +++++++++++++++++++++++++++++++++---
> 2 files changed, 54 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index 99895d9c3bdd..8add0209c9c7 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -27,6 +27,7 @@ enum sbi_ext_id {
> SBI_EXT_IPI = 0x735049,
> SBI_EXT_RFENCE = 0x52464E43,
> SBI_EXT_HSM = 0x48534D,
> + SBI_EXT_SRST = 0x53525354,
> };
>
> enum sbi_ext_base_fid {
> @@ -70,6 +71,21 @@ enum sbi_hsm_hart_status {
> SBI_HSM_HART_STATUS_STOP_PENDING,
> };
>
> +enum sbi_ext_srst_fid {
> + SBI_EXT_SRST_RESET = 0,
> +};
> +
> +enum sbi_srst_reset_type {
> + SBI_SRST_RESET_TYPE_SHUTDOWN = 0,
> + SBI_SRST_RESET_TYPE_COLD_REBOOT,
> + SBI_SRST_RESET_TYPE_WARM_REBOOT,
> +};
> +
> +enum sbi_srst_reset_reason {
> + SBI_SRST_RESET_REASON_NONE = 0,
> + SBI_SRST_RESET_REASON_SYS_FAILURE,
> +};
> +
> #define SBI_SPEC_VERSION_DEFAULT 0x1
> #define SBI_SPEC_VERSION_MAJOR_SHIFT 24
> #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
> diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
> index f4a7db3d309e..49155588e56c 100644
> --- a/arch/riscv/kernel/sbi.c
> +++ b/arch/riscv/kernel/sbi.c
> @@ -7,6 +7,7 @@
>
> #include <linux/init.h>
> #include <linux/pm.h>
> +#include <linux/reboot.h>
> #include <asm/sbi.h>
> #include <asm/smp.h>
>
> @@ -501,6 +502,32 @@ int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask,
> }
> EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid);
>
> +static void sbi_srst_reset(unsigned long type, unsigned long reason)
> +{
> + sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_RESET, type, reason,
> + 0, 0, 0, 0);
> + pr_warn("%s: type=0x%lx reason=0x%lx failed\n",
> + __func__, type, reason);
> +}
> +
> +static int sbi_srst_reboot(struct notifier_block *this,
> + unsigned long mode, void *cmd)
> +{
> + sbi_srst_reset((mode == REBOOT_WARM || mode == REBOOT_SOFT) ?
> + SBI_SRST_RESET_TYPE_WARM_REBOOT :
> + SBI_SRST_RESET_TYPE_COLD_REBOOT,
> + SBI_SRST_RESET_REASON_NONE);
> + return NOTIFY_DONE;
> +}
> +
> +static struct notifier_block sbi_srst_reboot_nb;
> +
> +static void sbi_srst_power_off(void)
> +{
> + sbi_srst_reset(SBI_SRST_RESET_TYPE_SHUTDOWN,
> + SBI_SRST_RESET_REASON_NONE);
> +}
> +
> /**
> * sbi_probe_extension() - Check if an SBI extension ID is supported or not.
> * @extid: The extension ID to be probed.
> @@ -577,22 +604,30 @@ void __init sbi_init(void)
> sbi_get_firmware_id(), sbi_get_firmware_version());
> if (sbi_probe_extension(SBI_EXT_TIME) > 0) {
> __sbi_set_timer = __sbi_set_timer_v02;
> - pr_info("SBI v0.2 TIME extension detected\n");
> + pr_info("SBI TIME extension detected\n");
> } else {
> __sbi_set_timer = __sbi_set_timer_v01;
> }
> if (sbi_probe_extension(SBI_EXT_IPI) > 0) {
> __sbi_send_ipi = __sbi_send_ipi_v02;
> - pr_info("SBI v0.2 IPI extension detected\n");
> + pr_info("SBI IPI extension detected\n");
> } else {
> __sbi_send_ipi = __sbi_send_ipi_v01;
> }
> if (sbi_probe_extension(SBI_EXT_RFENCE) > 0) {
> __sbi_rfence = __sbi_rfence_v02;
> - pr_info("SBI v0.2 RFENCE extension detected\n");
> + pr_info("SBI RFENCE extension detected\n");
> } else {
> __sbi_rfence = __sbi_rfence_v01;
> }
> + if (sbi_probe_extension(SBI_EXT_SRST) > 0 &&
> + sbi_minor_version() >= 3) {
> + pr_info("SBI SRST extension detected\n");
> + pm_power_off = sbi_srst_power_off;
> + sbi_srst_reboot_nb.notifier_call = sbi_srst_reboot;
> + sbi_srst_reboot_nb.priority = 192;
> + register_restart_handler(&sbi_srst_reboot_nb);
> + }
> } else {
> __sbi_set_timer = __sbi_set_timer_v01;
> __sbi_send_ipi = __sbi_send_ipi_v01;
> --
> 2.25.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
Reviewed-by: Atish Patra <atish.patra@....com>
--
Regards,
Atish
Powered by blists - more mailing lists