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Date: Wed, 3 Mar 2021 08:49:23 -0800
From: Sean Christopherson <seanjc@...gle.com>
To: Like Xu <like.xu@...ux.intel.com>
Cc: Peter Zijlstra <peterz@...radead.org>,
Paolo Bonzini <pbonzini@...hat.com>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>,
Kan Liang <kan.liang@...ux.intel.com>,
Dave Hansen <dave.hansen@...el.com>, wei.w.wang@...el.com,
Borislav Petkov <bp@...en8.de>, kvm@...r.kernel.org,
x86@...nel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/9] perf/x86/intel: Fix a comment about guest LBR
support
On Wed, Mar 03, 2021, Like Xu wrote:
> Starting from v5.12, KVM reports guest LBR and extra_regs
> support when the host has relevant support.
>
> Cc: Peter Zijlstra <peterz@...radead.org>
> Reviewed-by: Kan Liang <kan.liang@...ux.intel.com>
> Signed-off-by: Like Xu <like.xu@...ux.intel.com>
> ---
> arch/x86/events/intel/core.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index d4569bfa83e3..a32acc7733a7 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -5565,7 +5565,7 @@ __init int intel_pmu_init(void)
>
> /*
> * Access LBR MSR may cause #GP under certain circumstances.
> - * E.g. KVM doesn't support LBR MSR
> + * E.g. KVM doesn't support LBR MSR before v5.12.
Just delete this part of the comment.
> * Check all LBT MSR here.
> * Disable LBR access if any LBR MSRs can not be accessed.
> */
> --
> 2.29.2
>
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