lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 02 Mar 2021 15:04:31 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     Sasha Levin <sashal@...nel.org>, linux-kernel@...r.kernel.org,
        stable@...r.kernel.org
Cc:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...ainline.org>,
        Sasha Levin <sashal@...nel.org>, linux-clk@...r.kernel.org
Subject: Re: [PATCH AUTOSEL 5.10 22/47] clk: qcom: gdsc: Implement NO_RET_PERIPH flag

Quoting Sasha Levin (2021-03-02 03:56:21)
> From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>
> 
> [ Upstream commit 785c02eb35009a4be6dbc68f4f7d916e90b7177d ]
> 
> In some rare occasions, we want to only set the RETAIN_MEM bit, but
> not the RETAIN_PERIPH one: this is seen on at least SDM630/636/660's
> GPU-GX GDSC, where unsetting and setting back the RETAIN_PERIPH bit
> will generate chaos and panics during GPU suspend time (mainly, the
> chaos is unaligned access).
> 
> For this reason, introduce a new NO_RET_PERIPH flag to the GDSC
> driver to address this corner case.
> 

Same comment as on 5.11

> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>
> Link: https://lore.kernel.org/r/20210113183817.447866-8-angelogioacchino.delregno@somainline.org
> Signed-off-by: Stephen Boyd <sboyd@...nel.org>
> Signed-off-by: Sasha Levin <sashal@...nel.org>
> ---
>  drivers/clk/qcom/gdsc.c | 10 ++++++++--
>  drivers/clk/qcom/gdsc.h |  3 ++-
>  2 files changed, 10 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
> index af26e0695b86..51ed640e527b 100644
> --- a/drivers/clk/qcom/gdsc.c
> +++ b/drivers/clk/qcom/gdsc.c
> @@ -183,7 +183,10 @@ static inline int gdsc_assert_reset(struct gdsc *sc)
>  static inline void gdsc_force_mem_on(struct gdsc *sc)
>  {
>         int i;
> -       u32 mask = RETAIN_MEM | RETAIN_PERIPH;
> +       u32 mask = RETAIN_MEM;
> +
> +       if (!(sc->flags & NO_RET_PERIPH))
> +               mask |= RETAIN_PERIPH;
>  
>         for (i = 0; i < sc->cxc_count; i++)
>                 regmap_update_bits(sc->regmap, sc->cxcs[i], mask, mask);
> @@ -192,7 +195,10 @@ static inline void gdsc_force_mem_on(struct gdsc *sc)
>  static inline void gdsc_clear_mem_on(struct gdsc *sc)
>  {
>         int i;
> -       u32 mask = RETAIN_MEM | RETAIN_PERIPH;
> +       u32 mask = RETAIN_MEM;
> +
> +       if (!(sc->flags & NO_RET_PERIPH))
> +               mask |= RETAIN_PERIPH;
>  
>         for (i = 0; i < sc->cxc_count; i++)
>                 regmap_update_bits(sc->regmap, sc->cxcs[i], mask, 0);
> diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h
> index bd537438c793..5bb396b344d1 100644
> --- a/drivers/clk/qcom/gdsc.h
> +++ b/drivers/clk/qcom/gdsc.h
> @@ -42,7 +42,7 @@ struct gdsc {
>  #define PWRSTS_ON              BIT(2)
>  #define PWRSTS_OFF_ON          (PWRSTS_OFF | PWRSTS_ON)
>  #define PWRSTS_RET_ON          (PWRSTS_RET | PWRSTS_ON)
> -       const u8                        flags;
> +       const u16                       flags;
>  #define VOTABLE                BIT(0)
>  #define CLAMP_IO       BIT(1)
>  #define HW_CTRL                BIT(2)
> @@ -51,6 +51,7 @@ struct gdsc {
>  #define POLL_CFG_GDSCR BIT(5)
>  #define ALWAYS_ON      BIT(6)
>  #define RETAIN_FF_ENABLE       BIT(7)
> +#define NO_RET_PERIPH  BIT(8)
>         struct reset_controller_dev     *rcdev;
>         unsigned int                    *resets;
>         unsigned int                    reset_count;
> -- 
> 2.30.1
>

Powered by blists - more mailing lists