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Message-ID: <CAHp75Ven4piceFaBhn1kc=vtwM4o-GXmz3eAZoNhU8w+iP5qxQ@mail.gmail.com>
Date: Fri, 5 Mar 2021 16:45:53 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Hector Martin <marcan@...can.st>
Cc: linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
Marc Zyngier <maz@...nel.org>, Rob Herring <robh@...nel.org>,
Arnd Bergmann <arnd@...nel.org>,
Olof Johansson <olof@...om.net>,
Krzysztof Kozlowski <krzk@...nel.org>,
Mark Kettenis <mark.kettenis@...all.nl>,
Tony Lindgren <tony@...mide.com>,
Mohamed Mediouni <mohamed.mediouni@...amail.com>,
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Alexander Graf <graf@...zon.com>,
Will Deacon <will@...nel.org>,
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Catalin Marinas <catalin.marinas@....com>,
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"David S. Miller" <davem@...emloft.net>,
devicetree <devicetree@...r.kernel.org>,
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Subject: Re: [RFT PATCH v3 08/27] asm-generic/io.h: Add a non-posted variant
of ioremap()
On Thu, Mar 4, 2021 at 11:40 PM Hector Martin <marcan@...can.st> wrote:
>
> ARM64 currently defaults to posted MMIO (nGnRnE), but some devices
> require the use of non-posted MMIO (nGnRE). Introduce a new ioremap()
> variant to handle this case. ioremap_np() is aliased to ioremap() by
> default on arches that do not implement this variant.
Hmm... But isn't it basically a requirement to those device drivers to
use readX()/writeX() instead of readX_relaxed() / writeX_relaxed()?
...
> #define IORESOURCE_MEM_32BIT (3<<3)
> #define IORESOURCE_MEM_SHADOWABLE (1<<5) /* dup: IORESOURCE_SHADOWABLE */
> #define IORESOURCE_MEM_EXPANSIONROM (1<<6)
> +#define IORESOURCE_MEM_NONPOSTED (1<<7)
Not sure it's the right location (in a bit field) for this flag.
--
With Best Regards,
Andy Shevchenko
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