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Message-ID: <42da178.aba.178064b600d.Coremail.lichenyang@loongson.cn>
Date:   Sat, 6 Mar 2021 14:48:26 +0800 (GMT+08:00)
From:   李晨阳 <lichenyang@...ngson.cn>
To:     "Huacai Chen" <chenhuacai@...nel.org>
Cc:     "Maarten Lankhorst" <maarten.lankhorst@...ux.intel.com>,
        "Maxime Ripard" <mripard@...nel.org>,
        "Thomas Zimmermann" <tzimmermann@...e.de>,
        "David Airlie" <airlied@...ux.ie>,
        "Daniel Vetter" <daniel@...ll.ch>,
        LKML <linux-kernel@...r.kernel.org>,
        "Maling list - DRI developers" <dri-devel@...ts.freedesktop.org>,
        "Huacai Chen" <chenhuacai@...ngson.cn>,
        "Tiezhu Yang" <yangtiezhu@...ngson.cn>
Subject: Reply: Re: [PATCH v5] drm/loongson: Add DRM Driver for Loongson
 7A1000 bridge chip

&gt; &gt; +void ls7a_mm_wreg_locked(struct loongson_device *ldev, u32 offset, u32 val)
&gt; &gt; +{
&gt; &gt; +       unsigned long flags;
&gt; &gt; +
&gt; &gt; +       spin_lock_irqsave(&amp;ldev-&gt;mmio_lock, flags);
&gt; &gt; +       writel(val, ldev-&gt;mmio + offset);
&gt; &gt; +       spin_unlock_irqrestore(&amp;ldev-&gt;mmio_lock, flags);
&gt; &gt; +}
&gt; Why lock and disable irq? To workaround the hw issue from the first
&gt; revision of LS7A? If so, I suggest to remove the workaround. Because:
&gt; 1, mmio r/w will be used in irq context; 2, newer revision of LS7A
&gt; doesn't need workaround.
Yes,the lock is to workaround the hw issue,I have decided to remove the lock.
&gt; 
&gt; &gt; +
&gt; &gt; +       /* DC IO */
&gt; &gt; +       ldev-&gt;io = (void *)TO_UNCAC(LS7A_CHIPCFG_REG_BASE);
&gt; TO_UNCAC() is a MIPS-specific macro, I think ioremap() is better.
OK.I have switched to ioremap, and the test passed.
&gt; 
&gt; &gt; +#define LS7A_CHIPCFG_REG_BASE (0x10010000)
&gt; &gt; +#define PCI_DEVICE_ID_LOONGSON_DC 0x7a06
&gt; &gt; +#define PCI_DEVICE_ID_LOONGSON_GPU 0x7a15
&gt; They are already defined in include/linux/pci_ids.h.
In include/linux/pci_ids.h only defined PCI_VENDOR_ID_LOONGSON.

------------------------------
Loongson LiChenyang

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