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Message-Id: <20210308170945.161468-9-krzysztof.kozlowski@canonical.com>
Date: Mon, 8 Mar 2021 18:09:43 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: "Paul J. Murphy" <paul.j.murphy@...el.com>,
Daniele Alessandrelli <daniele.alessandrelli@...el.com>,
Rob Herring <robh+dt@...nel.org>,
Dinh Nguyen <dinguyen@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, arm@...nel.org, soc@...nel.org,
Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>
Cc: Krzysztof Kozlowski <krzk@...nel.org>
Subject: [RESEND 2nd PATCH 08/10] arm64: dts: intel: socfpga_agilex: align node names with dtschema
From: Krzysztof Kozlowski <krzk@...nel.org>
Align the NAND, GIC and UART node names with dtschema to silence
dtbs_check warnings like:
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml:
intc@...c1000: $nodename:0: 'intc@...c1000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml:
serial0@...02000: $nodename:0: 'serial0@...02000' does not match '^serial(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@...nel.org>
---
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index 3cba4c03d560..163f33b46e4f 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -78,7 +78,7 @@ psci {
method = "smc";
};
- intc: intc@...c1000 {
+ intc: interrupt-controller@...c1000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
@@ -316,7 +316,7 @@ mmc: dwmmc0@...08000 {
status = "disabled";
};
- nand: nand@...90000 {
+ nand: nand-controller@...90000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "altr,socfpga-denali-nand";
@@ -479,7 +479,7 @@ timer3: timer3@...00100 {
clock-names = "timer";
};
- uart0: serial0@...02000 {
+ uart0: serial@...02000 {
compatible = "snps,dw-apb-uart";
reg = <0xffc02000 0x100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
@@ -490,7 +490,7 @@ uart0: serial0@...02000 {
clocks = <&clkmgr AGILEX_L4_SP_CLK>;
};
- uart1: serial1@...02100 {
+ uart1: serial@...02100 {
compatible = "snps,dw-apb-uart";
reg = <0xffc02100 0x100>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
--
2.25.1
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