linux-kernel - [PATCH 3/3] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks

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Message-Id: <20210308182339.379775-4-krzysztof.kozlowski@canonical.com>
Date:   Mon,  8 Mar 2021 19:23:39 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Dinh Nguyen <dinguyen@...nel.org>,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
        Arnd Bergmann <arnd@...db.de>
Cc:     linux-arm-kernel@...ts.infradead.org,
        Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
Subject: [PATCH 3/3] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks

The Stratix 10 / Agilex / N5X clocks do not use anything other than OF
or COMMON_CLK so they should be compile testable on most of the
platforms.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
---
 drivers/clk/Makefile        |  5 +----
 drivers/clk/socfpga/Kconfig | 22 ++++++++++++++++------
 2 files changed, 17 insertions(+), 10 deletions(-)

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 12e46b12e587..9b582b3fca34 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -104,10 +104,7 @@ obj-y					+= renesas/
 obj-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip/
 obj-$(CONFIG_COMMON_CLK_SAMSUNG)	+= samsung/
 obj-$(CONFIG_CLK_SIFIVE)		+= sifive/
-obj-$(CONFIG_ARCH_SOCFPGA)		+= socfpga/
-obj-$(CONFIG_ARCH_AGILEX)		+= socfpga/
-obj-$(CONFIG_ARCH_N5X)			+= socfpga/
-obj-$(CONFIG_ARCH_STRATIX10)		+= socfpga/
+obj-y					+= socfpga/
 obj-$(CONFIG_PLAT_SPEAR)		+= spear/
 obj-y					+= sprd/
 obj-$(CONFIG_ARCH_STI)			+= st/
diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig
index 4922cc35f4cc..de7b3137e215 100644
--- a/drivers/clk/socfpga/Kconfig
+++ b/drivers/clk/socfpga/Kconfig
@@ -1,13 +1,23 @@
 # SPDX-License-Identifier: GPL-2.0
+config COMMON_CLK_SOCFPGA
+	bool "Intel SoCFPGA family clock support" if COMPILE_TEST
+	depends on ARCH_AGILEX || ARCH_N5X || ARCH_SOCFPGA || ARCH_STRATIX10 || COMPILE_TEST
+	default y if ARCH_AGILEX || ARCH_N5X || ARCH_SOCFPGA || ARCH_STRATIX10
+	help
+	  Support for the clock controllers present on Intel SoCFPGA and eASIC
+          devices like Stratix 10, Agilex and N5X eASIC.
+
+if COMMON_CLK_SOCFPGA
+
 config COMMON_CLK_STRATIX10
-	bool
-	# Intel Stratix / Agilex / N5X clock controller support
+	bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST
 	default y if ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10
-	depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10
+	depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 || COMPILE_TEST
 
 config COMMON_CLK_AGILEX
-	bool
-	# Intel Agilex / N5X clock controller support
+	bool "Intel Agilex / N5X clock controller support" if COMPILE_TEST
 	default y if ARCH_AGILEX || ARCH_N5X
-	depends on ARCH_AGILEX || ARCH_N5X
+	depends on ARCH_AGILEX || ARCH_N5X || COMPILE_TEST
 	select COMMON_CLK_STRATIX10
+
+endif # COMMON_CLK_SOCFPGA
-- 
2.25.1