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Message-Id: <20210308233858.24741-1-daniel.lezcano@linaro.org>
Date:   Tue,  9 Mar 2021 00:38:55 +0100
From:   Daniel Lezcano <daniel.lezcano@...aro.org>
To:     heiko@...ech.de
Cc:     linux-arm-kernel@...ts.infradead.org,
        linux-rockchip@...ts.infradead.org,
        Enric Balletbo i Serra <enric.balletbo@...labora.com>,
        Gaël PORTAY <gael.portay@...labora.com>,
        Rob Herring <robh@...nel.org>,
        MyungJoo Ham <myungjoo.ham@...sung.com>,
        Kyungmin Park <kyungmin.park@...sung.com>,
        Chanwoo Choi <cw00.choi@...sung.com>,
        Rob Herring <robh+dt@...nel.org>,
        linux-pm@...r.kernel.org (open list:DEVICE FREQUENCY (DEVFREQ)),
        devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
        DEVICE TREE BINDINGS), linux-kernel@...r.kernel.org (open list)
Subject: [RESEND PATCH v5 1/4] dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle.

From: Enric Balletbo i Serra <enric.balletbo@...labora.com>

The Rockchip DMC (Dynamic Memory Interface) needs to access to the PMU
general register files to know the DRAM type, so add a phandle to the
syscon that manages these registers.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@...labora.com>
Reviewed-by: Chanwoo Choi <cw00.choi@...sung.com>
Acked-by: Rob Herring <robh@...nel.org>
Signed-off-by: Gaël PORTAY <gael.portay@...labora.com>
Acked-by: MyungJoo Ham <myungjoo.ham@...sung.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
---
 Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
index a10d1f6d85c6..a41bcfef95c8 100644
--- a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
+++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
@@ -12,6 +12,8 @@ Required properties:
 			 for details.
 - center-supply:	 DMC supply node.
 - status:		 Marks the node enabled/disabled.
+- rockchip,pmu:		 Phandle to the syscon managing the "PMU general register
+			 files".
 
 Optional properties:
 - interrupts:		 The CPU interrupt number. The interrupt specifier
-- 
2.17.1

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