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Message-ID: <95188cbe469c657047cdee846098e9c9c118f3e2.camel@nxp.com>
Date:   Mon, 08 Mar 2021 10:53:15 +0800
From:   Liu Ying <victor.liu@....com>
To:     Robert Foss <robert.foss@...aro.org>
Cc:     linux-kernel <linux-kernel@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        dri-devel <dri-devel@...ts.freedesktop.org>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>, kishon@...com,
        Vinod Koul <vkoul@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Andrzej Hajda <a.hajda@...sung.com>,
        Neil Armstrong <narmstrong@...libre.com>,
        Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
        Jonas Karlman <jonas@...boo.se>,
        Jernej Skrabec <jernej.skrabec@...l.net>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>, shawnguo@...nel.org,
        s.hauer@...gutronix.de, kernel@...gutronix.de,
        Fabio Estevam <festevam@...il.com>, linux-imx@....com,
        agx@...xcpu.org, robert.chiras@....com, martin.kepplinger@...i.sm
Subject: Re: [PATCH v3 2/5] phy: Add LVDS configuration options

On Fri, 2021-03-05 at 16:03 +0100, Robert Foss wrote:
> Hey Liu,
> 
> This patch seems to be included in both this series and the "Add some
> DRM bridge drivers support for i.MX8qm/qxp SoCs" series. Instead of
> having the two series have a conflict I would suggest either merging
> them (if that makes sense) or removing this patch from one of them and
> explicitly stating that there is a dependency on the other series.

I choose not to merge them, because they are self-contained
respectively and splitting them makes the patch number(14) of the "Add
some DRM bridge drivers support for i.MX8qm/qxp SoCs" series look
better.  I guess this series will land prior to the other one, so I
would drop this patch from that series and state the dependency
there(actually, I mentioned I also sent this patch via this series
there).

> 
> (the patch itself still looks good though :) )

Thanks for your review :)

Liu Ying

> 
> On Fri, 11 Dec 2020 at 02:56, Liu Ying <victor.liu@....com> wrote:
> > This patch allows LVDS PHYs to be configured through
> > the generic functions and through a custom structure
> > added to the generic union.
> > 
> > The parameters added here are based on common LVDS PHY
> > implementation practices.  The set of parameters
> > should cover all potential users.
> > 
> > Cc: Kishon Vijay Abraham I <kishon@...com>
> > Cc: Vinod Koul <vkoul@...nel.org>
> > Cc: NXP Linux Team <linux-imx@....com>
> > Signed-off-by: Liu Ying <victor.liu@....com>
> > ---
> > v2->v3:
> > * No change.
> > 
> > v1->v2:
> > * No change.
> > 
> >  include/linux/phy/phy-lvds.h | 48 ++++++++++++++++++++++++++++++++++++++++++++
> >  include/linux/phy/phy.h      |  4 ++++
> >  2 files changed, 52 insertions(+)
> >  create mode 100644 include/linux/phy/phy-lvds.h
> > 
> > diff --git a/include/linux/phy/phy-lvds.h b/include/linux/phy/phy-lvds.h
> > new file mode 100644
> > index 00000000..1b5b9d6
> > --- /dev/null
> > +++ b/include/linux/phy/phy-lvds.h
> > @@ -0,0 +1,48 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Copyright 2020 NXP
> > + */
> > +
> > +#ifndef __PHY_LVDS_H_
> > +#define __PHY_LVDS_H_
> > +
> > +/**
> > + * struct phy_configure_opts_lvds - LVDS configuration set
> > + *
> > + * This structure is used to represent the configuration state of a
> > + * LVDS phy.
> > + */
> > +struct phy_configure_opts_lvds {
> > +       /**
> > +        * @bits_per_lane_and_dclk_cycle:
> > +        *
> > +        * Number of bits per data lane and differential clock cycle.
> > +        */
> > +       unsigned int bits_per_lane_and_dclk_cycle;
> > +
> > +       /**
> > +        * @differential_clk_rate:
> > +        *
> > +        * Clock rate, in Hertz, of the LVDS differential clock.
> > +        */
> > +       unsigned long differential_clk_rate;
> > +
> > +       /**
> > +        * @lanes:
> > +        *
> > +        * Number of active, consecutive, data lanes, starting from
> > +        * lane 0, used for the transmissions.
> > +        */
> > +       unsigned int lanes;
> > +
> > +       /**
> > +        * @is_slave:
> > +        *
> > +        * Boolean, true if the phy is a slave which works together
> > +        * with a master phy to support dual link transmission,
> > +        * otherwise a regular phy or a master phy.
> > +        */
> > +       bool is_slave;
> > +};
> > +
> > +#endif /* __PHY_LVDS_H_ */
> > diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
> > index e435bdb..d450b44 100644
> > --- a/include/linux/phy/phy.h
> > +++ b/include/linux/phy/phy.h
> > @@ -17,6 +17,7 @@
> >  #include <linux/regulator/consumer.h>
> > 
> >  #include <linux/phy/phy-dp.h>
> > +#include <linux/phy/phy-lvds.h>
> >  #include <linux/phy/phy-mipi-dphy.h>
> > 
> >  struct phy;
> > @@ -51,10 +52,13 @@ enum phy_mode {
> >   *             the MIPI_DPHY phy mode.
> >   * @dp:                Configuration set applicable for phys supporting
> >   *             the DisplayPort protocol.
> > + * @lvds:      Configuration set applicable for phys supporting
> > + *             the LVDS phy mode.
> >   */
> >  union phy_configure_opts {
> >         struct phy_configure_opts_mipi_dphy     mipi_dphy;
> >         struct phy_configure_opts_dp            dp;
> > +       struct phy_configure_opts_lvds          lvds;
> >  };
> > 
> >  /**
> > --
> > 2.7.4
> > 

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