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Message-ID: <CAHCEehK3P7jXq-v_xVm-0+BQsugG21VgjU0teyuUgANyR5ErKA@mail.gmail.com>
Date:   Tue, 9 Mar 2021 15:23:14 +0800
From:   Greentime Hu <greentime.hu@...ive.com>
To:     Philipp Zabel <p.zabel@...gutronix.de>
Cc:     Paul Walmsley <paul.walmsley@...ive.com>, hes@...ive.com,
        Erik Danie <erik.danie@...ive.com>,
        Zong Li <zong.li@...ive.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>, robh+dt@...nel.org,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Michael Turquette <mturquette@...libre.com>, sboyd@...nel.org,
        lorenzo.pieralisi@....com, alex.dewar90@...il.com,
        khilman@...libre.com, hayashi.kunihiko@...ionext.com,
        vidyas@...dia.com, jh80.chung@...sung.com,
        linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-clk@...r.kernel.org
Subject: Re: [RFC PATCH 2/6] clk: sifive: Use reset-simple in prci driver for
 PCIe driver

Philipp Zabel <p.zabel@...gutronix.de> 於 2021年3月4日 週四 下午7:58寫道:
>
> On Tue, 2021-03-02 at 18:59 +0800, Greentime Hu wrote:
> > We use reset-simple in this patch so that pcie driver can use
> > devm_reset_control_get() to get this reset data structure and use
> > reset_control_deassert() to deassert pcie_power_up_rst_n.
> >
> > Signed-off-by: Greentime Hu <greentime.hu@...ive.com>
> > ---
> >  drivers/clk/sifive/Kconfig       |  2 ++
> >  drivers/clk/sifive/sifive-prci.c | 14 ++++++++++++++
> >  drivers/clk/sifive/sifive-prci.h |  4 ++++
> >  drivers/reset/Kconfig            |  3 ++-
> >  4 files changed, 22 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/sifive/Kconfig b/drivers/clk/sifive/Kconfig
> > index 1c14eb20c066..9132c3c4aa86 100644
> > --- a/drivers/clk/sifive/Kconfig
> > +++ b/drivers/clk/sifive/Kconfig
> > @@ -10,6 +10,8 @@ if CLK_SIFIVE
> >
> >  config CLK_SIFIVE_PRCI
> >       bool "PRCI driver for SiFive SoCs"
> > +     select RESET_CONTROLLER
> > +     select RESET_SIMPLE
> >       select CLK_ANALOGBITS_WRPLL_CLN28HPC
> >       help
> >         Supports the Power Reset Clock interface (PRCI) IP block found in
> > diff --git a/drivers/clk/sifive/sifive-prci.c b/drivers/clk/sifive/sifive-prci.c
> > index baf7313dac92..925affc6de55 100644
> > --- a/drivers/clk/sifive/sifive-prci.c
> > +++ b/drivers/clk/sifive/sifive-prci.c
> > @@ -583,7 +583,21 @@ static int sifive_prci_probe(struct platform_device *pdev)
> >       if (IS_ERR(pd->va))
> >               return PTR_ERR(pd->va);
> >
> > +     pd->reset.rcdev.owner = THIS_MODULE;
> > +     pd->reset.rcdev.nr_resets = PRCI_RST_NR;
> > +     pd->reset.rcdev.ops = &reset_simple_ops;
> > +     pd->reset.rcdev.of_node = pdev->dev.of_node;
> > +     pd->reset.active_low = true;
> > +     pd->reset.membase = pd->va + PRCI_DEVICESRESETREG_OFFSET;
> > +     spin_lock_init(&pd->reset.lock);
> > +
> > +     r = devm_reset_controller_register(&pdev->dev, &pd->reset.rcdev);
> > +     if (r) {
> > +             dev_err(dev, "could not register reset controller: %d\n", r);
> > +             return r;
> > +     }
> >       r = __prci_register_clocks(dev, pd, desc);
> > +
>
> Accidental whitespace?
>
> Otherwise,
>
> Reviewed-by: Philipp Zabel <p.zabel@...gutronix.de>

Thank you, Philipp.
Yes, it is an accidental whitespace. I'll remove it in my next version patch.

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