linux-kernel - Re: [PATCH v3 5/7] irqchip/loongson-liointc: irqchip add 2.0 version

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <87wnugy9oe.wl-maz@kernel.org>
Date:   Tue, 09 Mar 2021 09:10:25 +0000
From:   Marc Zyngier <maz@...nel.org>
To:     Qing Zhang <zhangqing@...ngson.cn>
Cc:     Huacai Chen <chenhuacai@...nel.org>,
        Jiaxun Yang <jiaxun.yang@...goat.com>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Thomas Gleixner <tglx@...utronix.de>,
        linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org,
        wangming01@...ngson.cn
Subject: Re: [PATCH v3 5/7] irqchip/loongson-liointc: irqchip add 2.0 version

On Sat, 06 Mar 2021 02:36:31 +0000,
Qing Zhang <zhangqing@...ngson.cn> wrote:
> 
> Add IO interrupt controller support for Loongson 2k1000, different
> from the 3a series is that 2K1000 has 64 interrupt sources, 0-31
> correspond to the device tree liointc0 device node, and the other
> correspond to liointc1 node.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@...goat.com>
> Signed-off-by: Qing Zhang <zhangqing@...ngson.cn>
> ---
> 
> v2-v3: No change
> 
>  drivers/irqchip/irq-loongson-liointc.c | 55 +++++++++++++++++++++-----
>  1 file changed, 46 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-loongson-liointc.c b/drivers/irqchip/irq-loongson-liointc.c
> index 09b91b81851c..1c3c80f7f9f5 100644
> --- a/drivers/irqchip/irq-loongson-liointc.c
> +++ b/drivers/irqchip/irq-loongson-liointc.c
> @@ -20,6 +20,7 @@
>  
>  #define LIOINTC_CHIP_IRQ	32
>  #define LIOINTC_NUM_PARENT 4
> +#define LIOINTC_NUM_CORES	4
>  
>  #define LIOINTC_INTC_CHIP_START	0x20
>  
> @@ -42,6 +43,7 @@ struct liointc_handler_data {
>  struct liointc_priv {
>  	struct irq_chip_generic		*gc;
>  	struct liointc_handler_data	handler[LIOINTC_NUM_PARENT];
> +	void __iomem			*core_isr[LIOINTC_NUM_CORES];
>  	u8				map_cache[LIOINTC_CHIP_IRQ];
>  	bool				has_lpc_irq_errata;
>  };
> @@ -51,11 +53,12 @@ static void liointc_chained_handle_irq(struct irq_desc *desc)
>  	struct liointc_handler_data *handler = irq_desc_get_handler_data(desc);
>  	struct irq_chip *chip = irq_desc_get_chip(desc);
>  	struct irq_chip_generic *gc = handler->priv->gc;
> +	int core = get_ebase_cpunum() % LIOINTC_NUM_CORES;
>  	u32 pending;
>  
>  	chained_irq_enter(chip, desc);
>  
> -	pending = readl(gc->reg_base + LIOINTC_REG_INTC_STATUS);
> +	pending = readl(handler->priv->core_isr[core]);
>  
>  	if (!pending) {
>  		/* Always blame LPC IRQ if we have that bug */
> @@ -141,6 +144,15 @@ static void liointc_resume(struct irq_chip_generic *gc)
>  }
>  
>  static const char * const parent_names[] = {"int0", "int1", "int2", "int3"};
> +static const char * const core_reg_names[] = {"isr0", "isr1", "isr2", "isr3"};
> +
> +static void __iomem *liointc_get_reg_byname(struct device_node *node,
> +						const char *name)
> +{
> +	int index = of_property_match_string(node, "reg-names", name);
> +
> +	return of_iomap(node, index);

So if of_property_match_string() returns an error, you feed that error
to of_iomap()? Somehow, I don't think that's a good idea.

> +}
>  
>  static int __init liointc_of_init(struct device_node *node,
>  				  struct device_node *parent)
> @@ -159,10 +171,28 @@ static int __init liointc_of_init(struct device_node *node,
>  	if (!priv)
>  		return -ENOMEM;
>  
> -	base = of_iomap(node, 0);
> -	if (!base) {
> -		err = -ENODEV;
> -		goto out_free_priv;
> +	if (of_device_is_compatible(node, "loongson,liointc-2.0")) {
> +		base = liointc_get_reg_byname(node, "main");
> +		if (!base) {
> +			err = -ENODEV;
> +			goto out_free_priv;
> +		}
> +		for (i = 0; i < LIOINTC_NUM_CORES; i++) {
> +			priv->core_isr[i] =
> +				liointc_get_reg_byname(node, core_reg_names[i]);

Please write assignments on a single line.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.