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Date: Tue, 9 Mar 2021 16:56:31 +0300
From: Andrey Konovalov <andrey.konovalov@...aro.org>
To: Robert Foss <robert.foss@...aro.org>, agross@...nel.org,
bjorn.andersson@...aro.org, todor.too@...il.com,
mchehab@...nel.org, robh+dt@...nel.org,
angelogioacchino.delregno@...ainline.org,
linux-arm-msm@...r.kernel.org, linux-media@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
AngeloGioacchino Del Regno <kholk11@...il.com>,
Sakari Ailus <sakari.ailus@....fi>
Cc: Rob Herring <robh@...nel.org>, Tomasz Figa <tfiga@...omium.org>,
Azam Sadiq Pasha Kapatrala Syed <akapatra@...cinc.com>,
Sarvesh Sridutt <Sarvesh.Sridutt@...rtwirelesscompute.com>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Jonathan Marek <jonathan@...ek.ca>
Subject: Re: [PATCH v6 08/22] media: camss: Add missing format identifiers
Hi Robert,
Thank you for your patch!
On 04.03.2021 15:03, Robert Foss wrote:
> The CSI-2 spec defines format identifier for Data Type (DT),
> and how the Decode Format (DF) & Encode Format (EF) are implemented.
> The spec does however not define the DF, EF or Plain Format (PF)
> identifiers, as those are vendor specific.
>
> Plain formats describe the size of the pixels written by the RDI
> units to memory. PLAIN8 for example has the size 8 bits, and
> PLAIN32 32 bits. The appropriate Plain Format is determined by
> the Decode Format used. The smallest Plain Format that is able
> to contain a pixel of the used Decode Format is the appropriate
> one to use.
>
> As the vendor specific identifiers differ between hardware
> generations, split them out into separate headers.
>
> Signed-off-by: Robert Foss <robert.foss@...aro.org>
Reviewed-by: Andrey Konovalov <andrey.konovalov@...aro.org>
Thanks,
Andrey
> ---
>
> Changes since v5
> - Andrey: Gen 1 & Gen2 devices have different decode/encode/plain
> format definitions, list in separate headers
> - Andrey: Make commit msg more clear about what is in MIPI spec or not
>
>
> .../platform/qcom/camss/camss-csid-gen1.h | 27 +++++++++++++
> .../platform/qcom/camss/camss-csid-gen2.h | 39 +++++++++++++++++++
> .../media/platform/qcom/camss/camss-csid.c | 20 ++--------
> .../media/platform/qcom/camss/camss-csid.h | 24 ++++++++++++
> 4 files changed, 94 insertions(+), 16 deletions(-)
> create mode 100644 drivers/media/platform/qcom/camss/camss-csid-gen1.h
> create mode 100644 drivers/media/platform/qcom/camss/camss-csid-gen2.h
>
> diff --git a/drivers/media/platform/qcom/camss/camss-csid-gen1.h b/drivers/media/platform/qcom/camss/camss-csid-gen1.h
> new file mode 100644
> index 000000000000..80a2bc6efff6
> --- /dev/null
> +++ b/drivers/media/platform/qcom/camss/camss-csid-gen1.h
> @@ -0,0 +1,27 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * camss-csid-gen1.h
> + *
> + * Qualcomm MSM Camera Subsystem - CSID (CSI Decoder) Module Generation 1
> + *
> + * Copyright (C) 2021 Linaro Ltd.
> + */
> +#ifndef QC_MSM_CAMSS_CSID_GEN1_H
> +#define QC_MSM_CAMSS_CSID_GEN1_H
> +
> +#define DECODE_FORMAT_UNCOMPRESSED_6_BIT 0x0
> +#define DECODE_FORMAT_UNCOMPRESSED_8_BIT 0x1
> +#define DECODE_FORMAT_UNCOMPRESSED_10_BIT 0x2
> +#define DECODE_FORMAT_UNCOMPRESSED_12_BIT 0x3
> +#define DECODE_FORMAT_DPCM_10_6_10 0x4
> +#define DECODE_FORMAT_DPCM_10_8_10 0x5
> +#define DECODE_FORMAT_DPCM_12_6_12 0x6
> +#define DECODE_FORMAT_DPCM_12_8_12 0x7
> +#define DECODE_FORMAT_UNCOMPRESSED_14_BIT 0x8
> +#define DECODE_FORMAT_DPCM_14_8_14 0x9
> +#define DECODE_FORMAT_DPCM_14_10_14 0xa
> +
> +#define PLAIN_FORMAT_PLAIN8 0x0 /* supports DPCM, UNCOMPRESSED_6/8_BIT */
> +#define PLAIN_FORMAT_PLAIN16 0x1 /* supports DPCM, UNCOMPRESSED_10/16_BIT */
> +
> +#endif /* QC_MSM_CAMSS_CSID_GEN1_H */
> diff --git a/drivers/media/platform/qcom/camss/camss-csid-gen2.h b/drivers/media/platform/qcom/camss/camss-csid-gen2.h
> new file mode 100644
> index 000000000000..3a8ad001b3e8
> --- /dev/null
> +++ b/drivers/media/platform/qcom/camss/camss-csid-gen2.h
> @@ -0,0 +1,39 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * camss-csid-gen1.h
> + *
> + * Qualcomm MSM Camera Subsystem - CSID (CSI Decoder) Module Generation 1
> + *
> + * Copyright (C) 2021 Linaro Ltd.
> + */
> +#ifndef QC_MSM_CAMSS_CSID_GEN2_H
> +#define QC_MSM_CAMSS_CSID_GEN2_H
> +
> +#define DECODE_FORMAT_UNCOMPRESSED_6_BIT 0x0
> +#define DECODE_FORMAT_UNCOMPRESSED_8_BIT 0x1
> +#define DECODE_FORMAT_UNCOMPRESSED_10_BIT 0x2
> +#define DECODE_FORMAT_UNCOMPRESSED_12_BIT 0x3
> +#define DECODE_FORMAT_UNCOMPRESSED_14_BIT 0x4
> +#define DECODE_FORMAT_UNCOMPRESSED_16_BIT 0x5
> +#define DECODE_FORMAT_UNCOMPRESSED_20_BIT 0x6
> +#define DECODE_FORMAT_DPCM_10_6_10 0x7
> +#define DECODE_FORMAT_DPCM_10_8_10 0x8
> +#define DECODE_FORMAT_DPCM_12_6_12 0x9
> +#define DECODE_FORMAT_DPCM_12_8_12 0xa
> +#define DECODE_FORMAT_DPCM_14_8_14 0xb
> +#define DECODE_FORMAT_DPCM_14_10_14 0xc
> +#define DECODE_FORMAT_DPCM_12_10_12 0xd
> +#define DECODE_FORMAT_USER_DEFINED 0xe
> +#define DECODE_FORMAT_PAYLOAD_ONLY 0xf
> +
> +#define ENCODE_FORMAT_RAW_8_BIT 0x1
> +#define ENCODE_FORMAT_RAW_10_BIT 0x2
> +#define ENCODE_FORMAT_RAW_12_BIT 0x3
> +#define ENCODE_FORMAT_RAW_14_BIT 0x4
> +#define ENCODE_FORMAT_RAW_16_BIT 0x5
> +
> +#define PLAIN_FORMAT_PLAIN8 0x0 /* supports DPCM, UNCOMPRESSED_6/8_BIT */
> +#define PLAIN_FORMAT_PLAIN16 0x1 /* supports DPCM, UNCOMPRESSED_10/16_BIT */
> +#define PLAIN_FORMAT_PLAIN32 0x2 /* supports UNCOMPRESSED_20_BIT */
> +
> +#endif /* QC_MSM_CAMSS_CSID_GEN2_H */
> diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c
> index be3fe76f3dc3..697b51d6ad38 100644
> --- a/drivers/media/platform/qcom/camss/camss-csid.c
> +++ b/drivers/media/platform/qcom/camss/camss-csid.c
> @@ -22,6 +22,7 @@
> #include <media/v4l2-subdev.h>
>
> #include "camss-csid.h"
> +#include "camss-csid-gen1.h"
> #include "camss.h"
>
> #define MSM_CSID_NAME "msm_csid"
> @@ -37,8 +38,8 @@
> #define CAMSS_CSID_CID_n_CFG_ISPIF_EN BIT(0)
> #define CAMSS_CSID_CID_n_CFG_RDI_EN BIT(1)
> #define CAMSS_CSID_CID_n_CFG_DECODE_FORMAT_SHIFT 4
> -#define CAMSS_CSID_CID_n_CFG_PLAIN_FORMAT_8 (0 << 8)
> -#define CAMSS_CSID_CID_n_CFG_PLAIN_FORMAT_16 (1 << 8)
> +#define CAMSS_CSID_CID_n_CFG_PLAIN_FORMAT_8 (PLAIN_FORMAT_PLAIN8 << 8)
> +#define CAMSS_CSID_CID_n_CFG_PLAIN_FORMAT_16 (PLAIN_FORMAT_PLAIN16 << 8)
> #define CAMSS_CSID_CID_n_CFG_PLAIN_ALIGNMENT_LSB (0 << 9)
> #define CAMSS_CSID_CID_n_CFG_PLAIN_ALIGNMENT_MSB (1 << 9)
> #define CAMSS_CSID_CID_n_CFG_RDI_MODE_RAW_DUMP (0 << 10)
> @@ -59,22 +60,9 @@
> #define CAMSS_CSID_TG_DT_n_CGG_2(v, n) \
> (((v) == CAMSS_8x16 ? 0x0b4 : 0x0bc) + 0xc * (n))
>
> -#define DATA_TYPE_EMBEDDED_DATA_8BIT 0x12
> -#define DATA_TYPE_YUV422_8BIT 0x1e
> -#define DATA_TYPE_RAW_6BIT 0x28
> -#define DATA_TYPE_RAW_8BIT 0x2a
> -#define DATA_TYPE_RAW_10BIT 0x2b
> -#define DATA_TYPE_RAW_12BIT 0x2c
> -#define DATA_TYPE_RAW_14BIT 0x2d
> -
> -#define DECODE_FORMAT_UNCOMPRESSED_6_BIT 0x0
> -#define DECODE_FORMAT_UNCOMPRESSED_8_BIT 0x1
> -#define DECODE_FORMAT_UNCOMPRESSED_10_BIT 0x2
> -#define DECODE_FORMAT_UNCOMPRESSED_12_BIT 0x3
> -#define DECODE_FORMAT_UNCOMPRESSED_14_BIT 0x8
> -
> #define CSID_RESET_TIMEOUT_MS 500
>
> +
> struct csid_format {
> u32 code;
> u8 data_type;
> diff --git a/drivers/media/platform/qcom/camss/camss-csid.h b/drivers/media/platform/qcom/camss/camss-csid.h
> index 1824b3745e10..318c19bb26c9 100644
> --- a/drivers/media/platform/qcom/camss/camss-csid.h
> +++ b/drivers/media/platform/qcom/camss/camss-csid.h
> @@ -21,6 +21,30 @@
> #define MSM_CSID_PAD_SRC 1
> #define MSM_CSID_PADS_NUM 2
>
> +#define DATA_TYPE_EMBEDDED_DATA_8BIT 0x12
> +#define DATA_TYPE_YUV420_8BIT 0x18
> +#define DATA_TYPE_YUV420_10BIT 0x19
> +#define DATA_TYPE_YUV420_8BIT_LEGACY 0x1a
> +#define DATA_TYPE_YUV420_8BIT_SHIFTED 0x1c /* Chroma Shifted Pixel Sampling */
> +#define DATA_TYPE_YUV420_10BIT_SHIFTED 0x1d /* Chroma Shifted Pixel Sampling */
> +#define DATA_TYPE_YUV422_8BIT 0x1e
> +#define DATA_TYPE_YUV422_10BIT 0x1f
> +#define DATA_TYPE_RGB444 0x20
> +#define DATA_TYPE_RGB555 0x21
> +#define DATA_TYPE_RGB565 0x22
> +#define DATA_TYPE_RGB666 0x23
> +#define DATA_TYPE_RGB888 0x24
> +#define DATA_TYPE_RAW_24BIT 0x27
> +#define DATA_TYPE_RAW_6BIT 0x28
> +#define DATA_TYPE_RAW_7BIT 0x29
> +#define DATA_TYPE_RAW_8BIT 0x2a
> +#define DATA_TYPE_RAW_10BIT 0x2b
> +#define DATA_TYPE_RAW_12BIT 0x2c
> +#define DATA_TYPE_RAW_14BIT 0x2d
> +#define DATA_TYPE_RAW_16BIT 0x2e
> +#define DATA_TYPE_RAW_20BIT 0x2f
> +
> +
> enum csid_payload_mode {
> CSID_PAYLOAD_MODE_INCREMENTING = 0,
> CSID_PAYLOAD_MODE_ALTERNATING_55_AA = 1,
>
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