linux-kernel - Re: [PATCH v3 2/4] mfd: intel-m10-bmc: Simplify the legacy version reg definition

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Message-ID: <20210310091625.GJ4931@dell>
Date:   Wed, 10 Mar 2021 09:16:25 +0000
From:   Lee Jones <lee.jones@...aro.org>
To:     Xu Yilun <yilun.xu@...el.com>
Cc:     linux-kernel@...r.kernel.org, trix@...hat.com,
        matthew.gerlach@...ux.intel.com, russell.h.weight@...el.com,
        lgoncalv@...hat.com, hao.wu@...el.com
Subject: Re: [PATCH v3 2/4] mfd: intel-m10-bmc: Simplify the legacy version
 reg definition

On Mon, 01 Mar 2021, Xu Yilun wrote:

> The version register is the only one in the legacy I/O space to be
> accessed, so it is not necessary to define the legacy base & version
> register offset. A direct definition of the legacy version register
> address would be fine.
> 
> Signed-off-by: Xu Yilun <yilun.xu@...el.com>
> Reviewed-by: Tom Rix <trix@...hat.com>
> ---
> v3: no change, rebased to 5.12-rc1
> ---
>  drivers/mfd/intel-m10-bmc.c       | 12 +++++-------
>  include/linux/mfd/intel-m10-bmc.h |  2 +-
>  2 files changed, 6 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/mfd/intel-m10-bmc.c b/drivers/mfd/intel-m10-bmc.c
> index 06c9775..0d2c03f 100644
> --- a/drivers/mfd/intel-m10-bmc.c
> +++ b/drivers/mfd/intel-m10-bmc.c
> @@ -117,16 +117,14 @@ static int check_m10bmc_version(struct intel_m10bmc *ddata)
>  
>  	/*
>  	 * This check is to filter out the very old legacy BMC versions,
> -	 * M10BMC_LEGACY_SYS_BASE is the offset to this old block of mmio
> -	 * registers. In the old BMC chips, the BMC version info is stored
> -	 * in this old version register (M10BMC_LEGACY_SYS_BASE +
> -	 * M10BMC_BUILD_VER), so its read out value would have not been
> -	 * LEGACY_INVALID (0xffffffff). But in new BMC chips that the
> +	 * 0x300400 is the offset to this old block of mmio registers. In the

Not sure we want actual addresses in comments.

Please reword this to cover just the latest solution.

> +	 * old BMC chips, the BMC version info is stored in this old version
> +	 * register (0x300400 + 0x68), so its read out value would have not
> +	 * been LEGACY_INVALID (0xffffffff). But in new BMC chips that the
>  	 * driver supports, the value of this register should be
>  	 * LEGACY_INVALID.
>  	 */
> -	ret = m10bmc_raw_read(ddata,
> -			      M10BMC_LEGACY_SYS_BASE + M10BMC_BUILD_VER, &v);
> +	ret = m10bmc_raw_read(ddata, M10BMC_LEGACY_BUILD_VER, &v);
>  	if (ret)
>  		return -ENODEV;
>  
> diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h
> index 9b54ca1..4f1071f 100644
> --- a/include/linux/mfd/intel-m10-bmc.h
> +++ b/include/linux/mfd/intel-m10-bmc.h
> @@ -9,7 +9,7 @@
>  
>  #include <linux/regmap.h>
>  
> -#define M10BMC_LEGACY_SYS_BASE		0x300400
> +#define M10BMC_LEGACY_BUILD_VER		0x300468
>  #define M10BMC_SYS_BASE			0x300800
>  #define M10BMC_MEM_END			0x1fffffff
>  

-- 
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
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