linux-kernel - Re: [PATCH V2 20/25] perf/x86/intel: Add Alder Lake Hybrid support

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Message-ID: <01176076-049b-0129-4865-8c49cd002060@linux.intel.com>
Date:   Thu, 11 Mar 2021 11:53:35 -0500
From:   "Liang, Kan" <kan.liang@...ux.intel.com>
To:     Peter Zijlstra <peterz@...radead.org>
Cc:     mingo@...nel.org, linux-kernel@...r.kernel.org, acme@...nel.org,
        tglx@...utronix.de, bp@...en8.de, namhyung@...nel.org,
        jolsa@...hat.com, ak@...ux.intel.com, yao.jin@...ux.intel.com,
        alexander.shishkin@...ux.intel.com, adrian.hunter@...el.com,
        Mark Rutland <mark.rutland@....com>,
        Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
Subject: Re: [PATCH V2 20/25] perf/x86/intel: Add Alder Lake Hybrid support

On 3/11/2021 11:09 AM, Peter Zijlstra wrote:
> On Wed, Mar 10, 2021 at 08:37:56AM -0800, kan.liang@...ux.intel.com wrote:
>> From: Kan Liang <kan.liang@...ux.intel.com>
>>
>> Alder Lake Hybrid system has two different types of core, Golden Cove
>> core and Gracemont core. The Golden Cove core is registered to
>> "cpu_core" PMU. The Gracemont core is registered to "cpu_atom" PMU.
>>
>> The difference between the two PMUs include:
>> - Number of GP and fixed counters
>> - Events
>> - The "cpu_core" PMU supports Topdown metrics.
>>    The "cpu_atom" PMU supports PEBS-via-PT.
>>
>> The "cpu_core" PMU is similar to the Sapphire Rapids PMU, but without
>> PMEM.
>> The "cpu_atom" PMU is similar to Tremont, but with different
>> event_constraints, extra_regs and number of counters.
>>
> 
>> +		/* Initialize big core specific PerfMon capabilities.*/
>> +		pmu = &x86_pmu.hybrid_pmu[X86_HYBRID_PMU_CORE_IDX];
>> +		pmu->name = "cpu_core";
> 
>> +		/* Initialize Atom core specific PerfMon capabilities.*/
>> +		pmu = &x86_pmu.hybrid_pmu[X86_HYBRID_PMU_ATOM_IDX];
>> +		pmu->name = "cpu_atom";
> 
> So do these things use the same event lists as SPR and TNT?

No, there will be two new event lists on ADL. One is for Atom core, and 
the other is for big core. They are different to SPR and TNT.

> Is there any
> way to discover that, because AFAICT /proc/cpuinfo will say every CPU
> is 'Alderlake', and the above also doesn't give any clue.
>

Ricardo once submitted a patch to expose the CPU type under 
/sys/devices/system/cpu, but I don't know the latest status.
https://lore.kernel.org/lkml/20201003011745.7768-5-ricardo.neri-calderon@linux.intel.com/

> FWIW, ARM big.LITTLE does discriminate in its /proc/cpuinfo, but I'm not
> entirely sure it's really useful. Mark said perf userspace uses
> somethink akin to our CPUID, except exposed through sysfs, to find the
> event lists.
>

Perf tool can use the pmu name.
For perf stat -e cpu_atom/EVENT_NAME/, perf will apply the event list 
for atom.
For perf stat -e cpu_core/EVENT_NAME/, perf will apply the event list 
for the big core.
For perf stat -e EVENT_NAME, perf tool will check if the EVENT_NAME 
exists. If it's available on both event list, perf will automatically 
create two events, perf stat -e cpu_atom/EVENT_NAME/,cpu_core/EVENT_NAME/.
If the event name is only available on a certain type, e.g., atom. The 
perf tool will only apply the corresponding event, e.g., perf stat -e 
cpu_atom/EVENT_NAME/

> My desktop has: cpu/caps/pmu_name and that gives "skylake", do we want
> the above to have cpu_core/caps/pmu_name give "sapphire_rapids" etc.. ?
> 

I think current implementation should be good enough.

$ cat /sys/devices/cpu_atom/caps/pmu_name
alderlake_hybrid

"alderlake_hybrid" tells the perf tool that it's Alder Lake Hybrid system.
"cpu_atom" tells the perf tool that it's for Atom core.

Thanks,
Kan