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Message-ID: <YEpW30jfRlVsYHqV@lunn.ch>
Date: Thu, 11 Mar 2021 18:43:59 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Ilya Lipnitskiy <ilya.lipnitskiy@...il.com>
Cc: Sean Wang <sean.wang@...iatek.com>,
Landen Chao <Landen.Chao@...iatek.com>,
Vivien Didelot <vivien.didelot@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Russell King <linux@...linux.org.uk>, netdev@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next,v2 1/3] net: dsa: mt7530: setup core clock even
in TRGMII mode
On Wed, Mar 10, 2021 at 06:09:52PM -0800, Ilya Lipnitskiy wrote:
> A recent change to MIPS ralink reset logic made it so mt7530 actually
> resets the switch on platforms such as mt7621 (where bit 2 is the reset
> line for the switch). That exposed an issue where the switch would not
> function properly in TRGMII mode after a reset.
>
> Reconfigure core clock in TRGMII mode to fix the issue.
Hi Ilya
For a patch series, netdev expects there to be a patch 0/X which
explains the big picture. What do these patches as a whole do. This
then gets used in the merge commit message.
Andrew
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