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Message-ID: <cafd05ea-088e-c7c8-41f6-beafaa943453@roeck-us.net>
Date: Thu, 11 Mar 2021 07:19:44 -0800
From: Guenter Roeck <linux@...ck-us.net>
To: Wolfram Sang <wsa@...nel.org>
Cc: Chris Packham <Chris.Packham@...iedtelesis.co.nz>,
"jdelvare@...e.com" <jdelvare@...e.com>,
"linux-hwmon@...r.kernel.org" <linux-hwmon@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-i2c@...r.kernel.org" <linux-i2c@...r.kernel.org>,
"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>
Subject: Re: Errant readings on LM81 with T2080 SoC
On 3/11/21 12:18 AM, Wolfram Sang wrote:
>
>> Bummer. What is really weird is that you see clock stretching under
>> CPU load. Normally clock stretching is triggered by the device, not
>> by the host.
>
> One example: Some hosts need an interrupt per byte to know if they
> should send ACK or NACK. If that interrupt is delayed, they stretch the
> clock.
>
Indeed, the i2c-mpc driver sends TXAK (only) after receiving
that interrupt. Since that is running in the context of the user
process, that may well be delayed substantially on a loaded system.
Maybe the interrupt handler will need to play a more active role
in the i2c-mpc driver. Alternatively, the transfer function could
be handled by a high priority kernel thread.
Guenter
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