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Message-Id: <1615516725-4975-4-git-send-email-shengjiu.wang@nxp.com>
Date: Fri, 12 Mar 2021 10:38:42 +0800
From: Shengjiu Wang <shengjiu.wang@....com>
To: lgirdwood@...il.com, broonie@...nel.org, perex@...ex.cz,
tiwai@...e.com, alsa-devel@...a-project.org,
linux-kernel@...r.kernel.org, timur@...nel.org,
nicoleotsuka@...il.com, Xiubo.Lee@...il.com, festevam@...il.com,
linuxppc-dev@...ts.ozlabs.org, robh+dt@...nel.org,
devicetree@...r.kernel.org
Subject: [PATCH v5 3/6] ASoC: dt-bindings: fsl_rpmsg: Add binding doc for rpmsg audio device
fsl_rpmsg is a virtual audio device. Mapping to real hardware
devices are SAI, DMA controlled by Cortex M core. What we see from
Linux side is a device which provides audio service by rpmsg channel.
Signed-off-by: Shengjiu Wang <shengjiu.wang@....com>
---
.../devicetree/bindings/sound/fsl,rpmsg.yaml | 108 ++++++++++++++++++
1 file changed, 108 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml
diff --git a/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml b/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml
new file mode 100644
index 000000000000..b4c190bddd84
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml
@@ -0,0 +1,108 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/fsl,rpmsg.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP Audio RPMSG CPU DAI Controller
+
+maintainers:
+ - Shengjiu Wang <shengjiu.wang@....com>
+
+description: |
+ fsl_rpmsg is a virtual audio device. Mapping to real hardware devices
+ are SAI, DMA controlled by Cortex M core. What we see from Linux
+ side is a device which provides audio service by rpmsg channel.
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx7ulp-rpmsg-audio
+ - fsl,imx8mn-rpmsg-audio
+ - fsl,imx8mm-rpmsg-audio
+ - fsl,imx8mp-rpmsg-audio
+
+ model:
+ $ref: /schemas/types.yaml#/definitions/string
+ description: User specified audio sound card name
+
+ clocks:
+ items:
+ - description: Peripheral clock for register access
+ - description: Master clock
+ - description: DMA clock for DMA register access
+ - description: Parent clock for multiple of 8kHz sample rates
+ - description: Parent clock for multiple of 11kHz sample rates
+
+ clock-names:
+ items:
+ - const: ipg
+ - const: mclk
+ - const: dma
+ - const: pll8k
+ - const: pll11k
+
+ power-domains:
+ description:
+ List of phandle and PM domain specifier as documented in
+ Documentation/devicetree/bindings/power/power_domain.txt
+ maxItems: 1
+
+ memory-region:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ phandle to a node describing reserved memory (System RAM memory)
+ The M core can't access all the DDR memory space on some platform,
+ So reserved a specific memory for dma buffer which M core can
+ access.
+ (see bindings/reserved-memory/reserved-memory.txt)
+
+ audio-codec:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: The phandle to a node of audio codec
+
+ audio-routing:
+ $ref: /schemas/types.yaml#/definitions/non-unique-string-array
+ description: |
+ A list of the connections between audio components. Each entry is a
+ pair of strings, the first being the connection's sink, the second
+ being the connection's source.
+
+ fsl,enable-lpa:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: enable low power audio path.
+
+ fsl,rpmsg-out:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ This is a boolean property. If present, the transmitting function
+ will be enabled.
+
+ fsl,rpmsg-in:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ This is a boolean property. If present, the receiving function
+ will be enabled.
+
+required:
+ - compatible
+ - model
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx8mn-clock.h>
+
+ rpmsg_audio: rpmsg_audio {
+ compatible = "fsl,imx8mn-rpmsg-audio";
+ model = "wm8524-audio";
+ fsl,enable-lpa;
+ fsl,rpmsg-out;
+ clocks = <&clk IMX8MN_CLK_SAI3_IPG>,
+ <&clk IMX8MN_CLK_SAI3_ROOT>,
+ <&clk IMX8MN_CLK_SDMA3_ROOT>,
+ <&clk IMX8MN_AUDIO_PLL1_OUT>,
+ <&clk IMX8MN_AUDIO_PLL2_OUT>;
+ clock-names = "ipg", "mclk", "dma", "pll8k", "pll11k";
+ };
--
2.27.0
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