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Message-Id: <ZN4TPQ.4G2MK5P8EC4W2@crapouillou.net>
Date:   Thu, 11 Mar 2021 13:40:47 +0000
From:   Paul Cercueil <paul@...pouillou.net>
To:     Christoph Hellwig <hch@...radead.org>
Cc:     Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
        Maxime Ripard <mripard@...nel.org>,
        Thomas Zimmermann <tzimmermann@...e.de>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Sam Ravnborg <sam@...nborg.org>, od@...c.me,
        dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
        linux-mips@...r.kernel.org
Subject: Re: [PATCH v2 5/5] drm/ingenic: Add option to alloc cached GEM
 buffers



Le jeu. 11 mars 2021 à 12:30, Christoph Hellwig <hch@...radead.org> a 
écrit :
> On Sun, Mar 07, 2021 at 08:28:35PM +0000, Paul Cercueil wrote:
>>  With the module parameter ingenic-drm.cached_gem_buffers, it is 
>> possible
>>  to specify that we want GEM buffers backed by non-coherent memory.
> 
> Shouldn't there be a way to discover this through a DT property?

Good question. My original way of thinking was that as this feature 
speeds up only software rendering, this is really 
application-dependent: a modern desktop where everything is rendered 
via the GPU wouldn't benefit much from it. With that in mind, it is 
fine as a module option.

On the other hand... the "software rendering is faster with 
non-coherent buffers" really is a SoC property, since it is only true 
for some generations of Ingenic SoCs and not others. So it would make 
sense to have a DT property for it.

-Paul


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