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Date:   Fri, 12 Mar 2021 19:57:52 +0800
From:   Hector Yuan <hector.yuan@...iatek.com>
To:     Matthias Brugger <matthias.bgg@...il.com>
CC:     <linux-mediatek@...ts.infradead.org>,
        <linux-arm-kernel@...ts.infradead.org>, <linux-pm@...r.kernel.org>,
        "Rafael J. Wysocki" <rjw@...ysocki.net>,
        Viresh Kumar <viresh.kumar@...aro.org>,
        "Rob Herring" <robh+dt@...nel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <wsd_upstream@...iatek.com>
Subject: Re: [PATCH v10] cpufreq: mediatek-hw: Add support for Mediatek
 cpufreq HW driver

On Sun, 2021-01-31 at 11:34 +0100, Matthias Brugger wrote:
> 
> On 29/12/2020 07:17, Hector Yuan wrote:
> > The CPUfreq HW present in some Mediatek chipsets offloads the steps necessary for changing the frequency of CPUs. 
> > The driver implements the cpufreq driver interface for this hardware engine. 
> > This patch depends on MT6779 DTS patchset[1] submitted by Hanks Chen.
> 
> This dependency got resolved, the patch is mainline since v5.11. Please delete
> it in further revisions of the patch set to minimize confusion.
> 
> Thanks!
> 
Thanks, I will remove this dependency in the next version. 
> > 
> > From v8 to v9, there are three more modifications.
> > 1. Based on patchset[2], align binding with scmi for performance domain.
> > 2. Add the CPUFREQ fast switch function support and define DVFS latency.
> > 3. Based on patchser[3], add energy model API parameter for mW.
> > 
> > From v7 to v8, there are three more patches based on patchset v8[4].
> > This patchset is about to register power table to Energy model for EAS and thermal usage.
> > 1. EM CPU power table
> > - Register energy model table for EAS and thermal cooling device usage.
> > - Read the coresponding LUT for power table.
> > 2. SVS initialization
> > - The SVS(Smart Voltage Scaling) engine is a hardware which is
> >   used to calculate optimized voltage values for CPU power domain.
> >   DVFS driver could apply those optimized voltage values to reduce power consumption.
> > - Driver will polling if HW engine is done for SVS initialization.
> >   After that, driver will read power table and register it to EAS.
> > - CPUs must be in power on state when doing SVS. Use pm_qos to block cpu-idle state for SVS initializing.
> > 3. Cooling device flag
> > - Add cooling device flag for thermal
> > 
> > [1]  https://lkml.org/lkml/2020/8/4/1094
> > [2]  https://lore.kernel.org/lkml/20201116181356.804590-1-sudeep.holla@arm.com/
> > [3]  https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git/commit/?h=linux-next&id=c250d50fe2ce627ca9805d9c8ac11cbbf922a4a6
> > [4]  https://lkml.org/lkml/2020/9/23/384
> > 
> > 
> > Hector.Yuan (2):
> >   cpufreq: mediatek-hw: Add support for CPUFREQ HW
> >   dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW
> > 
> >  .../bindings/cpufreq/cpufreq-mediatek-hw.yaml      |  116 ++++++
> >  drivers/cpufreq/Kconfig.arm                        |   12 +
> >  drivers/cpufreq/Makefile                           |    1 +
> >  drivers/cpufreq/mediatek-cpufreq-hw.c              |  370 ++++++++++++++++++++
> >  4 files changed, 499 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml
> >  create mode 100644 drivers/cpufreq/mediatek-cpufreq-hw.c
> > 

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